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JN5164 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer JN5164
Beschreibung IEEE802.15.4 Wireless Microcontroller
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 30 Seiten
JN5164 Datasheet, Funktion
Data Sheet: JN516x
IEEE802.15.4 Wireless Microcontroller
Overview
The JN516x series is a range of ultra low power, high performance wireless
microcontrollers supporting JenNet-IP, ZigBee PRO or RF4CE networking
stacks to facilitate the development of Home Automation, Smart Energy,
Light Link and Remote control applications. They feature an enhanced 32-
bit RISC processor with embedded Flash and EEPROM memory, offering
high coding efficiency through variable width instructions, a multi-stage
instruction pipeline and low power operation with programmable clock
speeds. They also include a 2.4GHz IEEE802.15.4 compliant transceiver
and a comprehensive mix of analogue and digital peripherals. Three
memory configurations are available to suit different applications. The best
in class operating current of 15mA, with a 0.6uA sleep timer mode, gives
excellent battery life allowing operation direct from a coin cell.
The peripherals support a wide range of applications. They include a 2-wire
I2C, and SPI ports which can operate as either master or slave, a four
channel ADC with battery and a temperature sensor. It can support a large
switch matrix of up to 100 elements, or alternatively a 20 key capacitive
touch pad.
Block Diagram
XTAL
2.4GHz
Radio
Including
Diversity
Power
Management
Watchdog
Timer
Voltage Brownout
O-QPSK
Modem
IEEE 802.15.4
Baseband
Processor
128-bit AES
Hardware
Encryption
RAM
8/32K
Flash
64/160/256K
32-bit
RISC CPU
4kB
EEPROM
SPI
Master & Slave
2-Wire Serial
(Master/Slave)
4xPWM + Timer
2xUART
20 DIO
Sleep Counter
4-Channel
10-bit ADC
Battery and
Temp Sensors
Benefits
Single chip device to run
stack and application
Very low current solution for
long battery life – over 10 yrs
Supports multiple network
stacks
Highly featured 32-bit RISC
CPU for high performance
and low power
System BOM is low in
component count and cost
Flexible sensor interfacing
options
Applications
Robust and secure low power
wireless applications
RF4CE Remote Controls
JenNet-IP networks
ZigBee SE networks
ZigBee Light Link networks
Lighting & Home automation
Toys and gaming peripherals
Smart Energy
Energy harvesting, for
example self powered light
switch
Features: Radio
2.4GHz IEEE802.15.4 compliant
128-bit AES security processor
MAC accelerator with packet
formatting, CRCs, address check,
auto-acks, timers
Integrated ultra low power sleep
oscillator – 0.6µA
2.0V to 3.6V battery operation
Deep sleep current 0.12µA (Wake-up
from IO)
<$0.15 external component cost
RX current 17mA , TX 15mA
Receiver sensitivity -95dBm
Transmit power 2.5dBm
Time of Flight engine for ranging
Antenna Diversity (Auto RX)
Features: Microcontroller
32-bit RISC CPU, 1 to 32MHz clock
speed
Variable instruction width for high
coding efficiency
Multi-stage instruction pipeline
JN5161: 64kB/8kB/4kB
JN5164: 160kB/32kB/4kB
JN5168: 256kB/32kB/4kB
(Flash/RAM/EEPROM)
Data EEPROM with guaranteed 100k
write operations.
RF4CE, JenNet-IP, ZigBee SE and
ZigBee Light Link stacks
2-wire I2C compatible serial interface.
Can operate as either master or slave
5xPWM (4x timer & 1 timer/counter)
2 low power sleep counters
2x UART
SPI Master & Slave port, 3 selects
Supply voltage monitor with 8
programmable thresholds
4-input 10-bit ADC, comparator
Battery and temperature sensors
Watchdog & Brown Out Reset
Up to 20 Digital IO Pins (DIO)
Infra-red remote control transmitter
Temp range (-40°C to +125°C)
6x6mm 40-lead
Lead-free and RoHS compliant
© NXP Laboratories UK 2013
JN-DS-JN516x v1.3 Production
1






JN5164 Datasheet, Funktion
1 Introduction
The JN516x is an IEEE802.15.4 wireless microcontroller that provides a fully integrated solution for applications using
the IEEE802.15.4 standard in the 2.4 - 2.5GHz ISM frequency band [1], including Zigbee PRO, ZigBee Smart Energy,
ZigBee LightLink, RF4CE and JenNet-IP. There are 3 versions in the range, differing only by memory configuration
JN5161-001: 64kB Flash, 8kB RAM, 4 kB EEPROM, suitable for IEEE802.15.4 and RF4CE applications
JN5164-001: 160kB Flash, 32kB RAM, 4 kB EEPROM suitable for Jennet-IP, IEEE802.15.4 and RF4CE applications
JN5168-001: 256kB Flash, 32kB RAM, 4 kB EEPROM suitable for all applications
Applications that transfer data wirelessly tend to be more complex than wired ones. Wireless protocols make
stringent demands on frequencies, data formats, timing of data transfers, security and other issues. Application
development must consider the requirements of the wireless network in addition to the product functionality and user
interfaces. To minimise this complexity, NXP provides a series of software libraries and interfaces that control the
transceiver and peripherals of the JN516x. These libraries and interfaces remove the need for the developer to
understand wireless protocols and greatly simplifies the programming complexities of power modes, interrupts and
hardware functionality.
In view of the above, it is not necessary to provide the register details of the JN516x in the datasheet.
The device includes a Wireless Transceiver, RISC CPU, on chip memory and an extensive range of peripherals.
1.1 Wireless Transceiver
The Wireless Transceiver comprises a 2.45GHz radio, a modem, a baseband controller and a security coprocessor.
In addition, the radio also provides an output to control transmit-receive switching of external devices such as power
amplifiers allowing applications that require increased transmit power to be realised very easily. Appendix B.4,
describes a complete reference design including Printed Circuit Board (PCB) design and Bill Of Materials (BOM).
The security coprocessor provides hardware-based 128-bit AES-CCM* modes as specified by the IEEE802.15.4
2006 standard. Specifically this includes encryption and authentication covered by the MIC –32/-64/-128, ENC and
ENC-MIC –32/-64/-128 modes of operation.
The transceiver elements (radio, modem and baseband) work together to provide IEEE802.15.4 (2006) MAC and
PHY functionality under the control of a protocol stack. Applications incorporating IEEE802.15.4 functionality can be
developed rapidly by combining user-developed application software with a protocol stack library.
1.2 RISC CPU and Memory
A 32-bit RISC CPU allows software to be run on-chip, its processing power being shared between the IEEE802.15.4
MAC protocol, other higher layer protocols and the user application. The JN516x has a unified memory architecture,
code memory, data memory, peripheral devices and I/O ports are organised within the same linear address space.
The device contains up to 256kbytes of Flash, up to 32kbytes of RAM and 4kbytes EEPROM .
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JN-DS-JN516x v1.3 Production
© NXP Laboratories UK 2013

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JN5164 pdf, datenblatt
2.2 Pin Descriptions
2.2.1 Power Supplies
The device is powered from the VDD1 and VDD2 pins, each being decoupled with a 100nF ceramic capacitor. VDD1
is the power supply to the analogue circuitry; it should be decoupled to ground. VDD2 is the power supply for the
digital circuitry; and should also be decoupled to ground. In addition, a common 10µF tantalum capacitor is required
for low frequencies. Decoupling pins for the internal 1.8V regulators are provided which each require a100nF
capacitor located as close to the device as practical. VB_SYNTH, VB_RAM and VB_DIG require only a 100nF
capacitor. VB_RF and VB_RF2 should be connected together as close to the device as practical, and require one
100nF capacitor and one 47pF capacitor. The pin VB_VCO requires a 10nF capacitor. Refer to B.4.1 for schematic
diagram.
VSSA (paddle), VSS1, VSS2 are the ground pins.
Users are strongly discouraged from connecting their own circuits to the 1.8v regulated supply pins, as the regulators
have been optimised to supply only enough current for the internal circuits.
2.2.2 Reset
RESETN is an active low reset input pin that is connected to a 500kΩ internal pull-up resistor. It may be pulled low
by an external circuit. Refer to Section 6.2 for more details.
2.2.3 32MHz Oscillator
A crystal is connected between XTAL_IN and XTAL_OUT to form the reference oscillator, which drives the system
clock. A capacitor to analogue ground is required on each of these pins. Refer to Section 5.1 for more details. The
32MHz reference frequency is divided down to 16MHz and this is used as the system clock throughout the device.
2.2.4 Radio
The radio is a single ended design, requiring a capacitor and just two inductors to match to 50Ω microstrip line to the
RF_IN pin.
An external resistor (43kΩ) is required between IBIAS and analogue ground (paddle) to set various bias currents and
references within the radio.
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JN-DS-JN516x v1.3 Production
© NXP Laboratories UK 2013

12 Page





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