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Número de pieza | LM64C21P | |
Descripción | Passive Matrix Color LCD Unit | |
Fabricantes | Sharp Electrionic Components | |
Logotipo | ||
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DATE
!PPROVED BY: DATE
SHARP
LIQUID CRYSTAL DISPLAY GROUP
SHARP CORPORATION
SPEC N O , L C 9 4 Y 0 1
FILE No.
ISSUE NOV, 2,1994
PAGE 23 Pages
APPLICABLE DIVISION
“9DUTY PANEL DEVELOPMENT
CENTER
❑ ITFT DEVELOPMENT CENTER
❑ ILCD PRODUCTS DEVELOPMENT
CENTER
IJEL PRODUCTION DEPT.
SPECIFICATION
I
DEVICE SPECIFICATION fOI’
Passive Matrix COLOR LCD Unit
(840x480 dots)
\
Model No,
LM64CZ1 P
❑ ICUSTOMER’ S APPROVAL
BY
. PRESENT
BY
Y, Inoue fl
DEPARTMENT GENERAL MANAGER
ENGINEERING DEPARTMENT II
DUTY PANEL DEVELOPMENT CINTER
LIQUID CRYSTAL DISPLAY GROUP
SHARP CORPORATION
1 page SHARP
SPI!C No,
LC94Y01
MODEL No,
LM64C21P
PAGE
4
5. Electrical Specifications
5-1 Electrical characteristics
Table t
Ta=25 ‘C, VD~=5, O V’t O, 5 V
Parameter
Symbol
Supply voltage (Logic) Vl)xl-vss
Contrast adjust voltage Vcon
-Vss
Input signal voltage
VIN
Input leakage current IIL
Supply current (Logic)
Rush current (Logic)
Power consumption
IDD
Irush
Pd
Conditions
Note 1)
Ta=O “C
Ta=25 “C!
Ta=40 “C
‘H’ l e v e l
“L’ level
‘H’ level
‘L* level
Note 2)
Ta=2f “C, power ON
Note 2]
Min. TYP, Max, Unit
4.5 500 5,5 v
0.80 – – v
1,35 1.95 2.55 v
2,80
0. 8VDD
– VI)D+(), 3 v
o – 0. 2VDD v
100 PA
-1oo – – AA
— 110 170 mA
2 A(pk] X20 UIS+l A(pk)XIO fls max
— 500 850 I mw
Note 1 Under the following conditions, ;
@Immediately after the rise of DISP signal,
: 2 Ax20 MS
@Under the situation that DISP signal is on and kept steady. : 1 Ax1O us
Note 2) Under the following conditions, ;
This value is direct current,
5 Page .
SHARP
I SPEC No,
I MODEL No.
I PAGE
LC94Y01
L M 6 4 C 2 1 P I 10
6. Module Driving Method
6.1 Circuit configuration
Fig,9 shows the block diagram of themodule’s circuitry.
6,2 Display Face Configuration
The display consists of 640x3 (R, G, B) x480 dots as shown in Fig, 1,
The interface is single panel with double drive to be driven at 1/244 duty ratio,
6,3 Input Data and Control Signal
The LCD driver is 240 bits LSI, consisting of shift registers, latch circuits and
LCD driver circuits, Input data for each row (640x3 R,G,BI will be sequentially
transferred in the form of 8 bit parallel data through shift registers from top
left of the display together with clock signal (XCI(],
When input of one row (640 x 3,R,G,B dots) is completed, the data will be latched
in the form of parallel data corresponding to the signal electrodes by the falling
edge-of latch signal (LP), Then, the corresponding drive signals will be transmitted
to the 640 x 3 lines of column electrodes of the LCD panel by the LCD drive
circuits,
At this time, scan start-up signal (YD) has been transferred from the scan signal
driver to the 1st row of scan electrodes, and the contents of the data signals are
displayed on the 1st row of the display face according to the combinations of
voltages applied to the scan and signal electrodes of the LCD. While the data of 1st
row are being displayed, the data of 2nd row are entered, When data for 640x3 dots
have been transferred, they will be latched (y the falling edge of LP, switching
the display to the 2nd row,
Such data : nput will be repeated up to the 240th row of each display segment,
from upper row to lower rows, to complete one frame of display by time sharing
method,
Simultaneously the same scanning sequence occur at the lower panel,
Then data input proceeds to the next display frame,
YD generates scan signal to drive horizontal electrodes,
11 Page |
Páginas | Total 11 Páginas | |
PDF Descargar | [ Datasheet LM64C21P.PDF ] |
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