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G080Y1-T01 Schematic ( PDF Datasheet ) - Chi Mei

Teilenummer G080Y1-T01
Beschreibung TFT LCD Module
Hersteller Chi Mei
Logo Chi Mei Logo 




Gesamt 24 Seiten
G080Y1-T01 Datasheet, Funktion
Issued Date: Jan. 09, 2009
Model No.: G080Y1-T01
Tentative
TFT LCD Tentative Specification
MODEL NO.: G080Y1-T01
Customer:
Approved by:
Note:
2009-02-10
20:25:40 CST
PMMD
Director
cs_lee(
/17564/44926)
Director Accept
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G080Y1-T01 Datasheet, Funktion
Issued Date: Jan. 09, 2009
Model No.: G080Y1-T01
Tentative
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
No. Test Item
Test Condition
Note
1 High Temperature Storage
95 , 240 hours
2 Low Temperature Storage
-40 , 240 hours
3 Thermal Shock Storage
4 High Temperature Operating
{(-40 , 0.5 hour) (85 , 0.5 hour)}, 100 cycles
85 , 240 hours
(1) (2)
5 Low Temperature Operating
-30 , 240 hours
6 High Temperature & High Humidity Operating 60 , 90% RH, 240hours
7 Shock (Non-Operating)
100G, 6ms, +/-XYZ 3 times
(3)(5)
8 Vibration (Non-Operating)
3G, 10 to 200 Hz, sine wave
(4)(5)
Note (1) There should be no condensation on the surface of panel during test.
Note (2) The temperature of panel display surface area should be 90 Max.
Note (3) 6ms, half sine wave, 3 times for +/-X, +/-Y, +/-Z.
Note (4) 3 directions: X, Y and Z axes, 60min per each direction; 6 cycles; sweep time = 5 minutes; peak
acceleration = 3G; frequency = 10 to 200 Hz; sine wave.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
Note (6) In the standard conditions, there is no function failure issue occurred. All the cosmetic specification
is judged before the reliability test.
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G080Y1-T01 pdf, datenblatt
Issued Date: Jan. 09, 2009
Model No.: G080Y1-T01
Tentative
36 R01 I Red data
37 R00 I Red data (LSB)
38 RESETB I Hardware global reset. Low active (Default pull high)
Define input clock polarity
39 EDGSL I When EDGSL=L, Latch data by rising edge of CLK (Default Pull Low)
When EDGSL=H, CLK polarity is inverted, Latch data by falling edge of CLK
Shift direction of Source Driver IC internal shift register is controlled by this pin as
40
LR
I
show below:
LR=H SO1Æ ……SO1200 (Default pull high)
LR=L SO1200Æ…….SO1
41 GND I Power Ground
42 VCOM I Common voltage input
43 VCOM I Common voltage input
44 VCOM_Cst I Power Ground
45 VCC I Digital power supply (+3.3V)
46 VCC I Digital power supply (+3.3V)
47 AVDD I Analog power supply (+12V)
48 AVDD I Analog power supply (+12V)
49 GM1 I Gamma voltage level 1
50 GM2 I Gamma voltage level 2
51 GM3 I Gamma voltage level 3
52 GM4 I Gamma voltage level 4
53 GM5 I Gamma voltage level 5
54 GM6 I Gamma voltage level 6
55 GM7 I Gamma voltage level 7
56 GM8 I Gamma voltage level 8
57 GM9 I Gamma voltage level 9
58 GM10 I Gamma voltage level 10
59 VSSA I Power Ground
60 GND I Power Ground
5.2 BACKLIGHT Driving Section
No
Symbol
I/O
Description
1 Hi I Power supply for backlight unit (High voltage)
2
GND
- Ground for backlight unit
Note (1) User’s connector Part No: Aces 87210_02X6X
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