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M392B5170FM0 Schematic ( PDF Datasheet ) - Samsung

Teilenummer M392B5170FM0
Beschreibung 240pin VLP Registered DIMM
Hersteller Samsung
Logo Samsung Logo 




Gesamt 41 Seiten
M392B5170FM0 Datasheet, Funktion
Rev. 1.01, Dec. 2010
M392B2873FH0
M392B5673FH0
M392B5670FH0
M392B5170FM0
240pin VLP Registered DIMM
based on 1Gb F-die
78FBGA with Lead-Free & Halogen-Free
(RoHS compliant)
datasheet
SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
SPECIFICATIONS WITHOUT NOTICE.
Products and specifications discussed herein are for reference purposes only. All information discussed
herein is provided on an "AS IS" basis, without warranties of any kind.
This document and all information discussed herein remain the sole and exclusive property of Samsung
Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property
right is granted by one party to the other party under this document, by implication, estoppel or other-
wise.
Samsung products are not intended for use in life support, critical care, medical, safety equipment, or
similar applications where product failure could result in loss of life or personal or physical harm, or any
military or defense application, or any governmental procurement to which special terms or provisions
may apply.
For updates or additional information about Samsung products, contact your nearest Samsung office.
All brand names, trademarks and registered trademarks belong to their respective owners.
2010 Samsung Electronics Co., Ltd. All rights reserved.
-1-






M392B5170FM0 Datasheet, Funktion
VLP Registered DIMM
datasheet
Rev. 1.01
DDR3 SDRAM
4. Registered DIMM Pin Configurations (Front side/Back side)
Pin Front Pin Back Pin Front Pin Back Pin Front Pin
1
VREFDQ
121
VSS
42
DQS8
162
NC,DQS17
,TDQS17
82
DQ33
202
2
VSS 122 DQ4
43
DQS8
163
VSS
83
VSS 203
3
DQ0 123 DQ5
44
VSS
164 CB6,NC
84
DQS4
204
4
DQ1
124
VSS
45 CB2,NC 165 CB7,NC 85
DQS4
205
5
VSS
125
DM0,DQS9
,TDQS9
46
CB3,NC
166
VSS
86
VSS 206
6
DQS0
126
NC,DQS9
,TDQS9
47
VSS
167 NC(TEST)
87
DQ34
207
7
DQS0
127
VSS
48 VTT, NC 168 RESET 88
DQ35
208
8 VSS 128 DQ6
KEY
89 VSS 209
9
DQ2 129 DQ7
49
VTT, NC
169 CKE1, NC
90
DQ40
210
10
DQ3
130
VSS
50
CKE0
170
VDD
91
DQ41
211
11 VSS 131 DQ12 51 VDD 171 A15 92 VSS 212
12
DQ8
132 DQ13
52
BA2 172 A14
93
DQS5
213
13
DQ9
133
VSS
53
Err_Out/NC
173
VDD
94
DQS5
214
14
VSS
134
DM1,DQS10
,TDQS10
54
15
DQS1
135
NC,DQS10
,TDQS10
55
VDD
174 A12/BC
95
VSS 215
A11 175
A9
96
DQ42
216
16
DQS1
136
VSS
56
A7
176 VDD
97
DQ43
217
17
VSS 137 DQ14 57
VDD
177
A8
98 VSS 218
18 DQ10 138 DQ15 58
A5 178 A6
99
DQ48
219
19
DQ11
139
VSS
59
20 VSS 140 DQ20 60
A4 179 VDD 100 DQ49 220
VDD
180
A3
101 VSS 221
21 DQ16 141 DQ21 61
A2 181 A1 102 DQS6 222
22
DQ17
142
VSS
62
VDD 182 VDD 103 DQS6 223
23
VSS
143
DM2,DQS11
,TDQS11
63
NC, CK1
183
VDD
104
VSS
224
24
DQS2
144
NC,DQS11
,TDQS11
64
NC, CK1
184
CK0
105 DQ50 225
25
DQS2
145
VSS
65
VDD 185 CK0 106 DQ51 226
26 VSS 146 DQ22 66 VDD 186 VDD 107 VSS 227
27
DQ18 147 DQ23
67
VREFCA
187 EVENT,NC 108
DQ56
228
28
DQ19
148
VSS
68
NC/Par_In
188
A0
109 DQ57 229
29 VSS 149 DQ28 69 VDD 189 VDD 110 VSS 230
30
DQ24 150 DQ29
70
A10/AP
190
BA1
111 DQS7 231
31
DQ25
151
VSS
71
32
VSS
152
DM3,DQS12
,TDQS12
72
33
DQS3
153
NC,DQS12
,TDQS12
73
34
DQS3
154
VSS
74
35 VSS 155 DQ30 75
BA0
VDD
WE
CAS
VDD
191 VDD 112 DQS7 232
192 RAS 113 VSS 233
193 S0 114 DQ58 234
194 VDD 115 DQ59 235
195 ODT0 116 VSS 236
36
DQ26 156 DQ31
76
S1,NC
196
A13
117
SA0
237
37
DQ27
157
VSS
77
ODT1,NC
197
VDD
118
38
VSS
158 CB4,NC
78
VDD 198 S3,NC 119
39 CB0,NC 159 CB5,NC 79
S2,NC
199
VSS
120
40
CB1,NC
160
VSS
80
41
VSS
161
DM8,DQS17
TDQS17,NC
81
VSS 200 DQ36
DQ32 201 DQ37
SCL
SA2
VTT
238
239
240
NOTE : NC = No internal Connection
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
Back
VSS
DM4,DQS13
,TDQS13
NC,DQS13
,TDQS13
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DM5,DQS14
,TDQS14
NC,DQS14
,TDQS14
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6,DQS15
,TDQS15
NC,DQS15
,TDQS15
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DM7/DQS16
TDQS16
DM7,DQS16
,TDQS16
VSS
DQ62
DQ63
VSS
VDDSPD
SA1
SDA
VSS
VTT
-6-

6 Page









M392B5170FM0 pdf, datenblatt
VLP Registered DIMM
datasheet
10.2 2GB, 256Mx72 Module (Populated as 2 ranks of x8 DDR3 SDRAMs)
Rev. 1.01
DDR3 SDRAM
DQS8
DQS8
DM8/DQS17
DQS17
CB[7:0]
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D8
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D17
DQS4
DQS4
DM4/DQS13
DQS13
DQ[39:32]
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D4
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D13
DQS3
DQS3
DM3/DQS12
DQS12
DQ[31:24]
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D3
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D12
DQS5
DQS5
DM5/DQS14
DQS14
DQ[47:40]
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D5
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D14
DQS2
DQS2
DM2/DQS11
DQS11
DQ[23:16]
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D2
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D11
DQS6
DQS6
DM6/DQS15
DQS15
DQ[55:48]
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D6
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D15
DQS1
DQS1
DM1/DQS10
DQS10
DQ[15:8]
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D1
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D10
DQS7
DQS7
DM7/DQS16
DQS16
DQ[63:56]
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D7
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D16
DQS0
DQS0
DM0/DQS9
DQS9
DQ[7:0]
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D0
Vtt
DQS
DQS
TDQS
TDQS
DQ[7:0]
ZQ
D9
Vtt
S0*
S1*
BA[N:0]
A[N:0]
VDDSPD
VDD
VTT
VREFCA
VREFDQ
VSS
Serial PD
D0 - D17
SCL
EVENT
Thermal sensor with SPD
EVENT
A0 A1 A2
D0 - D17
D0 - D17
D0 - D17
SA0 SA1 SA2
SDA
RAS
CAS
WE
CKE0
CKE1
ODT0
ODT1
NOTE :
1. Unless otherwise noted, resistor values are 15Ω ± 5%.
2. RS0 and RS1 alternate between the back and front sides of the DIMM.
3. ZQ resistors are 240Ω ± 1% . For all other resistor values refer to the appropriate
wiring diagram.
4. See the wiring diagrams for all resistors associated with the command, address
and control bus.
CK0
CK0
PAR_IN
RESET**
1:2
R
E
G
I
S
T
E
R
QERR
RST
RS0A-> CS0 : SDRAMs D[3:0], D8
RS0B-> CS0 : SDRAMs D[7:4]
RS1A-> CS1 : SDRAMs D[12:9], D17
RS1B-> CS1 : SDRAMs D[16:13]
RBA[N:0]A -> BA[N:0] : SDRAMs D[3:0], D[12:8], D17
RBA[N:0]B -> BA[N:0] : SDRAMs D[7:4], D[16:13]
RA[N:0]A -> A[N:0] : SDRAMs D[3:0], D[12:8], D17
RA[N:0]B -> A[N:0] : SDRAMs D[7:4, D[16:13]]
RRASA -> RAS : SDRAMs D[3:0], D[12:8], D17
RRASB -> RAS : SDRAMs D[7:4], D[16:13]
RCASA -> CAS : SDRAMs D[3:0], D[12:8], D17
RCASB -> CAS : SDRAMs D[7:4], D[16:13]
RWEA -> WE : SDRAMs D[3:0], D[12:8], D17
RWEB -> WE : SDRAMs D[7:4], D[16:13]
RCKE0A -> CKE0 : SDRAMs D[3:0], D8
RCKE0B -> CKE0 : SDRAMs D[7:4]
RCKE1A -> CKE1 : SDRAMs D[12:9], D17
RCKE1B -> CKE1 : SDRAMs D[16:13]
RODT0A -> ODT0 : SDRAMs D[3:0], D8
RODT0B -> ODT0 : SDRAMs D[7:4]
RODT1A -> ODT1 : SDRAMs D[12:9], D17
RODT1A -> ODT1 : SDRAMs D[16:13]
PCK0A -> CK : SDRAMs D[3:0], D8
PCK0B -> CK : SDRAMs D[7:4]
PCK1A -> CK : SDRAMs D[12:9], D17
PCK1B -> CK : SDRAMs D[16:13]
PCK0A -> CK : SDRAMs D[3:0], D8
PCK0B -> CK : SDRAMs D[7:4]
PCK1A -> CK : SDRAMs D[12:9], D17
PCK1B -> CK : SDRAMs D[16:13]
Err_out
RST** : SDRAMs D[8:0]
*S[3:2], CKE1, ODT1, CK1 and CK1 are NC
- 12 -

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