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PDF K8A65D Data sheet ( Hoja de datos )

Número de pieza K8A65D
Descripción TK8A65D
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo




1. K8A65D mosfet transistor






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TK8A65D
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (π-MOS)
TK8A65D
Switching Regulator Applications
Low drain-source ON-resistance: RDS (ON) = 0.7 (typ.)
High forward transfer admittance: |Yfs| = 4.5 S (typ.)
Low leakage current: IDSS = 10 μA (max) (VDS = 650 V)
Enhancement mode: Vth = 2.0 to 4.0 V (VDS = 10 V, ID = 1 mA)
Unit: mm
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Drain-source voltage
Gate-source voltage
Drain current
DC (Note 1)
Pulse (Note 1)
Drain power dissipation (Tc = 25°C)
Single pulse avalanche energy
(Note 2)
Avalanche current
Repetitive avalanche energy (Note 3)
Channel temperature
Storage temperature range
Symbol
VDSS
VGSS
ID
IDP
PD
EAS
IAR
EAR
Tch
Tstg
Rating
650
±30
8
32
45
416
8
4.5
150
55 to 150
Unit
V
V
A
W
mJ
A
mJ
°C
°C
1: Gate
2: Drain
3: Source
JEDEC
JEITA
SC-67
TOSHIBA
2-10U1B
Weight: 1.7 g (typ.)
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability
Handbook (“Handling Precautions”/’’Derating Concept and Methods’’) and individual reliability data (i.e.
reliability test report and estimated failure rate, etc).
Thermal Characteristics
Characteristics
Symbol
Max Unit
Thermal resistance, channel to case
Thermal resistance, channel to ambient
Rth (ch-c)
Rth (ch-a)
2.78 °C/W
62.5 °C/W
Note 1: Ensure that the channel temperature does not exceed 150°C.
Note 2: VDD = 90 V, Tch = 25°C (initial), L = 11.5 mH, RG = 25 Ω, IAR = 8 A
Note 3: Repetitive rating: pulse width limited by maximum channel temperature
This transistor is an electrostatic-sensitive device. Handle with care.
1
2
3
Start of commercial production
2009-01
1 2013-11-01

1 page




K8A65D pdf
TK8A65D
10
1 Duty = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
0.001
10 μ
100 μ
rth – tw
SINGLE PULSE
PDM
t
T
Duty = t/T
Rth (ch-c) = 2.78 °C/W
1m
10 m
100 m
PULSE WIDTH tw (s)
1
10
SAFE OPERATING AREA
100
ID max (pulsed) *
10 ID max (continuous)
100 μs *
1 ms *
1
DC operation
Tc = 25°C
0.1
*: SINGLE NONREPETITIVE
0.01 PULSE Tc = 25°C
CURVES MUST BE
DERATED LINEARLY WITH
INCREASE IN
TEMPERATURE.
0.001
1 10
VDSS max
100
1000
DRAIN-SOURCE VOLTAGE VDS (V)
EAS – Tch
500
400
300
200
100
0
25 50 75 100 125 150
CHANNEL TEMPERATURE (INITIAL)
Tch(°C)
15 V
15 V
BVDSS
IAR
VDD
VDS
TEST CIRCUIT
WAVEFORM
RG = 25 Ω
VDD = 90 V, L = 11.5 mH
ΕAS
=
1
2
L
I2
⎜⎜⎝⎛
BVDSS
BVDSS VDD
⎟⎟⎠⎞
5 2013-11-01

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