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PDF LQ070Y5DG06 Data sheet ( Hoja de datos )
| Número de pieza | LQ070Y5DG06 | |
| Descripción | TFT LCD Module | |
| Fabricantes | Sharp | |
| Logotipo |  |
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(1) Summary
This TFT-LCD module is a color active matrix LCD module incorporating amorphous silicon TFT.
An outline of the module is given in Table 4-1.
(2) Features
Utilizes a panel with a 15:9 aspect ratio, which makes the module suitable for use in wide-screen
systems.
The 7.0 screen produces a high resolution image that is composed of 384,000 pixels elements in a
stripe arrangement.
Graphics and texts can be displayed on a 800 RGB 480 dots panel with 262,144 colors
by supplying 18 bit data signals(6 bit/color).
Wide viewing field angle technology is employed.(The most suitable viewing angle is in the 6 o'clock
direction.)
By adopting an active matrix drive, a picture with high contrast is realized.
Reduced reflection as a result of low reflection black matrix and an AG(antiglare) polarizer being
adopted.
By COG method, realized a slim, lightweight, and compact module.
Transparent intensity is raised by adoption of the rate LCD panel of a high aperture, a high
transparently color filter, and a high transparently polarizing plate.
The quality picture of natural color reproducibility is realized by adoption in TN normally white mode
excellent in color reproducibility.
An inverted video display in the vertical and horizontal directions is possible.
(3) Structure and Outline Dimensions
Outline dimensions of the module are given in Fig.1.
Structure of the TFT-LCD module are given in Fig.2.
This TFT-LCD module is composed of the color TFT-LCD panel, driver ICs, FPC, frame, shielding front
case and backlight unit.( circuit to drive the LEDbacklight is not built into this module.)
(4) Mechanical Specifications
Table4-1
Parameter
Specifications
Units
Screen size (Diagonal)
.7 [7.0”]
cm
Active area
152.40(W) × 91.44(H)
mm
Display format
800 × RGB(W) × 480(H)
dots
Dot pitch
0.0635(W × 0.1905(H)
mm
Pixel configuration
R,G,B Stripe configuration
Outline dimension
170.0(W) × 104.0(H) × 8.0(D)
mm
Mass
210 15
Note4-1 Typical values are shown.
For detailed measurements and tolerances, please refer to Fig.1.
( FPC(LED/LCD),FPC fixation sheet are excepted.)
Remarks
Note -1
5 Page 
7-3) Timing characteristics of input signals
Timing diagrams of input signal are shown in Fig3-1, Fig3-2.
Table7-3
VSHA=5.3V,VSHD=3.3V,GND=0V,Ta=25
Parameter
Symbol
Unit
Terminal
Operating Clock frequency fck
33.2
34.6
MHz
High level clock width
Low level clock width
Clock rise time
Tcwh
Tcwl
Tcr
12
13
ns
ns
CK
[Note7-7]
4 ns
Clock fall time
Tcf
4 ns
Start pulse frequency
Start pulse set up time
Start pulse hold time
fsp
Tsusp
Thsp
4
0
31.5
31.8
kHz
ns
ns
SPR
SPL
[Note7-8]
Start pulse width
Twsp 1/fck 1/fck 1.5/fck
ns
LS pulse frequency
flp
fsp
kHz
LS pulse set up time (CLS) Tsulp 5.0
s
LS pulse set up
time(SPL,SPR)
Tsulpsp 1/fck
ns LS
LS pulse hold time(DCLK) Thlpck 20
ns
High level LS pulse wide Twlp 1/fck
ns
Data set up time
Tsud
15
ns R0 R5,G0
Data hold time
Thd 10
ns G5,B0 B5
Operating Clock frequency fcls
fsp
kHz
Clock pulse with
Clock rise time
Twl 5.5
Trcl
1/fck
s
ns
CLS
Clock fall time
Tfcl
1/fck
ns
Start pulse frequency
fsps
60 65 Hz
Start pulse set up time Tsusps 100
ns
Start pulse hold time
Thsps 300
ns SPS
Start pulse rise time
Trsps
100 ns
Start pulse fall time
Tfsps
100 ns
COM signal set up time
Tsucom 3
s
COM signal hold time
Thcom 0
s VCOM
COM signal rise time
Trcom
2 s CS
COM signal fall time
Tfcom
2s
V0 10 signal set up time
V0 V10 signal hold time
V0 V10 signal rise time
V0 V10 signal fall time
Tsuv0
Thv0
Trv0
Tfv0
3
0
2
2
s
s
s
s
V0,V1,V2,V3,
V4,V5,V6,
V7,V8,V9,V10
[Note7-7] It is also possible that Tcr,Tcf exceeds the maximum value when the clock frequency
doesn't reach the maximum value. But please confirm there is no problem.
[Note7-8] The rising pulse in CK is existed only 1 time during Hi period (Twsp) on start pulse.
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| PDF Descargar | [ Datasheet LQ070Y5DG06.PDF ] | |
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