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MAX5813 Schematic ( PDF Datasheet ) - Maxim Integrated Products

Teilenummer MAX5813
Beschreibung Ultra-Small Quad-Channel 8-/10-/12-Bit Buffered Output DACs
Hersteller Maxim Integrated Products
Logo Maxim Integrated Products Logo 




Gesamt 30 Seiten
MAX5813 Datasheet, Funktion
EVALUATION KIT AVAILABLE
MAX5813/MAX5814/MAX5815
Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I2C Interface
General Description
The MAX5813/MAX5814/MAX5815 4-channel, low-power,
8-/10-/12-bit, voltage-output digital-to-analog converters
(DACs) include output buffers and an internal reference
that is selectable to be 2.048V, 2.500V, or 4.096V. The
MAX5813/MAX5814/MAX5815 accept a wide supply
voltage range of 2.7V to 5.5V with extremely low power
(3mW) consumption to accommodate most low-voltage
applications. A precision external reference input allows
rail-to-rail operation and presents a 100kI (typ) load to
an external reference.
The MAX5813/MAX5814/MAX5815 have an I2C-compatible,
2-wire interface that operates at clock rates up to
400kHz. The DAC output is buffered and has a low sup-
ply current of less than 250FA per channel and a low
offset error of Q0.5mV (typ). On power-up, the MAX5813/
MAX5814/MAX5815 reset the DAC outputs to zero, pro-
viding additional safety for applications that drive valves
or other transducers which need to be off on power-up.
The internal reference is initially powered down to allow
use of an external reference. The MAX5813/MAX5814/
MAX5815 allow simultaneous output updates using soft-
ware LOAD commands or the hardware load DAC logic
input (LDAC).
A clear logic input (CLR) allows the contents of the CODE
and the DAC registers to be cleared asynchronously and
sets the DAC outputs to zero. The MAX5813/MAX5814/
MAX5815 are available in a 14-pin TSSOP and an ultra-
small, 12-bump WLP package and are specified over the
-40NC to +125NC temperature range.
Applications
Programmable Voltage and Current Sources
Gain and Offset Adjustment
Automatic Tuning and Optical Control
Power Amplifier Control and Biasing
Process Control and Servo Loops
Portable Instrumentation
Data Acquisition
Ordering Information appears at end of data sheet.
Benefits and Features
S Four High-Accuracy DAC Channels
12-Bit Accuracy Without Adjustment
±1 LSB INL Buffered Voltage Output
Guaranteed Monotonic Over All Operating
Conditions
Independent Mode Settings for Each DAC
S Three Precision Selectable Internal References
2.048V, 2.500V, or 4.096V
S Internal Output Buffer
Rail-to-Rail Operation with External Reference
4.5µs Settling Time
Outputs Directly Drive 2kI Loads
S Small 5mm x 4.4mm 14-Pin TSSOP or Ultra-Small
1.6mm x 2.2mm 12-Bump WLP Package
S Wide 2.7V to 5.5V Supply Range
S Separate 1.8V to 5.5V VDDIO Power-Supply Input
S Fast 400kHz I2C-Compatible, 2-Wire Serial
Interface
S Power-On-Reset to Zero-Scale DAC Output
S LDAC and CLR For Asynchronous Control
S Three Software-Selectable Power-Down Output
Impedances
1kI, 100kI, or High Impedance
Functional Diagram
VDDIO
VDD REF
SCL
SDA
ADDR0
(ADDR1)
CLR
(LDAC)
I2C SERIAL
INTERFACE
POR
INTERNAL REFERENCE/
EXTERNAL BUFFER
CODE
REGISTER
DAC
LATCH
8 -/10-/12-BIT
DAC
CODE
CLEAR /
RESET
LOAD
CLEAR /
RESET
DAC CONTROL LOGIC
POWER-DOWN
GND
( ) TSSOP PACKAGE ONLY
MAX5813
MAX5814
MAX5815
1 OF 4 DAC CHANNELS
BUFFER
100kI 1kI
OUTA
OUTB
OUTC
OUTD
For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/MAX5813.related
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6167; Rev 3; 1/13






MAX5813 Datasheet, Funktion
MAX5813/MAX5814/MAX5815
Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I2C Interface
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 2.7V to 5.5V, VDDIO = 1.8V to 5.5V, VGND = 0V, CL = 200pF, RL = 2kI, TA = -40NC to +125NC, unless otherwise noted. Typical
values are at TA = +25NC.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
Input Low Voltage (Note 11)
2.2V < VDDIO < 5.5V
VIL
1.8V < VDDIO < 2.2V
Hysteresis Voltage
Input Leakage Current
VH
IIN VIN = 0V or VDDIO (Note 11)
Input Capacitance (Note 10)
CIN
ADDR_ Pullup/Pulldown Strength RPU, RPD (Note 12)
DIGITAL OUTPUT (SDA)
Output Low Voltage
VOL ISINK = 3mA
I2C TIMING CHARACTERISTICS (SCL, SDA, LDAC, CLR)
SCL Clock Frequency
fSCL
Bus Free Time Between a STOP
and a START Condition
tBUF
Hold Time Repeated for a
START Condition
SCL Pulse Width Low
SCL Pulse Width High
Setup Time for Repeated START
Condition
Data Hold Time
Data Setup Time
SDA and SCL Receiving
Rise Time
tHD;STA
tLOW
tHIGH
tSU;STA
tHD;DAT
tSU;DAT
tr
SDA and SCL Receiving
Fall Time
tf
SDA Transmitting Fall Time
Setup Time for STOP Condition
Bus Capacitance Allowed
Pulse Width of Suppressed Spike
CLR Removal Time Prior to a
Recognized START
CLR Pulse Width Low
LDAC Pulse Width Low
SCLK Rise to LDAC Fall to Hold
tf
tSU;STO
CB
tsp
tCLRSTA
tCLPW
tLDPW
tLDH
VDD = 2.7V to 5.5V
Applies to execution edge
MIN TYP MAX UNITS
0.15
0.3 x
VDDIO
0.2 x
VDDIO
V
V
Q0.1
Q1
FA
10 pF
30 50 90 kI
0.2 V
400 kHz
1.3 Fs
0.6 Fs
1.3 Fs
0.6 Fs
0.6 Fs
0 900 ns
100 ns
20 +
CB/10
300 ns
20 +
CB/10
300 ns
20 +
CB/10
0.6
10
250 ns
Fs
400 pF
50 ns
100 ns
20 ns
20 ns
400 ns
Maxim Integrated
  6

6 Page









MAX5813 pdf, datenblatt
MAX5813/MAX5814/MAX5815
Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I2C Interface
Typical Operating Characteristics (continued)
(MAX5815, 12-bit performance, TA = +25°C, unless otherwise noted.)
0.1Hz TO 10Hz OUTPUT NOISE, EXTERNAL
REFERENCE (VDD = 5V, VREF = 4.5V)
MAX5813 toc31
MIDSCALE UNLOADED
VP-P = 12µV
0.1Hz TO 10Hz OUTPUT NOISE, INTERNAL
REFERENCE (VDD = 5V, VREF = 2.048V)
MAX5813 toc32
MIDSCALE UNLOADED
VP-P = 13µV
2µV/div
2µV/div
4s/div
0.1Hz TO 10Hz OUTPUT NOISE, INTERNAL
REFERENCE (VDD = 5V, VREF = 2.5V)
MAX5813 toc33
MIDSCALE UNLOADED
VP-P = 15µV
2µV/div
4s/div
0.1Hz TO 10Hz OUTPUT NOISE, INTERNAL
REFERENCE (VDD = 5V, VREF = 4.096V)
MAX5813 toc34
MIDSCALE UNLOADED
VP-P = 16µV
2µV/div
4s/div
VREF DRIFT vs. TEMPERATURE
25 VDD = 2.7V,
INTERNAL VREF = 2.5V
20 BOX METHOD
15
10
5
0
2.8 2.9 3.0 3.2 3.3 3.4 3.6 3.7 3.9 4.0 4.1 4.3 4.4
TEMPERATURE DRIFT (ppm/°C)
Maxim Integrated
REFERENCE LOAD REGULATION
0
VDD = 5V
INTERNAL REFERENCE
-0.2
-0.4
-0.6
VREF = 2.048V, 2.5V, AND 4.096V
-0.8
-1.0
0 50 100 150 200 250 300 350 400 450 500
REFERENCE OUTPUT CURRENT (µA)
4s/div
SUPPLY CURRENT vs. INPUT LOGIC VOLTAGE
2000
1800
1600
1400
1200 VDDIO = 5V
1000
800
600 VDDIO = 3V
400
200
0
0
VDDIO = 1.8V
1234
INPUT LOGIC VOLTAGE (V)
5
  12

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