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PDF AX24C128A Data sheet ( Hoja de datos )

Número de pieza AX24C128A
Descripción 128K/256K-bit 2-WIRE SERIAL CMOS EEPROM
Fabricantes AXElite 
Logotipo AXElite Logotipo



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AX24C128A/256A
128K/256K-bit 2- WIRE SERIAL CMOS EEPROM
General Description
Features
The AX24C128A/AX24C256A provides
131,072/262,144 bits of serial electrically erasable
and programmable read-only memory (EEPROM)
organized as16,384/32,768 words of 8 bits each.
The device is optimized for use in many industrial
and commercial applications where low-power and
low-voltage operation are essential. The
AX24C128A/AX24C256A is available in space-
saving SOP-8 and TSSOP-8 packages and is
accessed via a two-wire serial interface. In addition,
the AX24C128A/AX24C256A is available in 1.7V
(1.7V to 5.5V) version.
Wide Voltage Operation
- VCC = 1.7V to 5.5V
Operating Ambient Temperature:
-40°C to +85°C
Internally Organized:
- AX24C128A, 16,384 X 8 (128K bits)
- AX24C256A, 32,768 X 8 (256K bits)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise
Suppression
Bidirectional Data Transfer Protocol
1MHz (5V), 400 KHz (1.7V, 2.5V, 2.7V)
Compatibility
Write Protect Pin for Hardware Data Protection
64-byte Page (128K, 256K) Write Modes
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms max)
High-reliability
- Endurance: 1 Million Write Cycles
- Data Retention: 100 Years
SOP-8 and TSSOP-8 packages
Pin Configuration
SOP-8
TSSOP-8
Pin Configuration
Pin Name
A0 - A2
SDA
SCL
WP
GND
VCC
Type
I
I/O & Open-drain
I
I
P
P
Functions
Address Inputs
Serial Data
Serial Clock Input
Write Protect
Ground
Power Supply
1/14
Axelite Confidential Materials, do not copy or distribute without written consent.
Rev.1.3 Mar.28 2012

1 page




AX24C128A pdf
Figure 1: Data Validity
AX24C128A/256A
Figure 2: Start and Stop Definition
Figure 3: Output Acknowledge
5/14
Axelite Confidential Materials, do not copy or distribute without written consent.
Rev.1.3 Mar.28 2012

5 Page





AX24C128A arduino
AX24C128A/256A
AC Electrical Characteristics
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = +1.7V to +5.5V, CL = 1 TTL
Gate and 100 pF (unless otherwise noted)
Parameter
Symbol
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time
Clock Low to Data Out Valid
Time the bus must be free before
a new transmission can start
Start Hold Time
Start Setup Time
Data In Hold Time
Data In Setup Time
Inputs Rise Time(1)
Inputs Fall Time(1)
Stop Setup Time
Data Out Hold Time
Write Cycle Time
5.0V, 25°C, Byte Mode
fSCL
tLOW
tHIGH
tI
tAA
tBUF
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
tF
tSU.STO
tDH
tWR
Endurance
1.7-volt
Min. Typ. Max.
- - 400
1.2 -
-
0.6 -
-
- - 50
0.1 - 0.9
1.2 -
-
0.6 -
-
0.6 -
-
0- -
100 -
-
- - 0.3
- - 300
0.6 -
-
50 -
-
- -5
1M -
-
5.0-volt
Min. Typ. Max.
- - 1000
0.6 -
-
0.4 -
-
- - 50
0.05 -
0.9
Units
kHZ
μs
μs
ns
μs
0.5 -
-
μs
0.25 -
-
μs
0.25 -
-
μs
0- -
μs
100 -
-
ns
- - 0.3
μs
- - 300
ns
0.25 -
-
μs
50 -
-
ns
- -5
ms
- - - Write Cycles
Note
1. This parameter is characterized and is not 100% tested.
2. AC measurement conditions:
RL (connects to VCC): 1.3kΩ (2.5V, 5V), 10kΩ (1.7V)
Input pulse voltages: 0.3 x VCC, 0.5 x VCC, 0.7 x VCC
Input rise and fall time:50 ns
Input and output timing reference voltages: 0.5 x VCC
The value of RL should be concerned according to the actual loading on the user's system.
11/14
Axelite Confidential Materials, do not copy or distribute without written consent.
Rev.1.3 Mar.28 2012

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