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PDF AUR9716 Data sheet ( Hoja de datos )

Número de pieza AUR9716
Descripción STEP DOWN DC-DC CONVERTER
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Data Sheet
1.0MHz to 1.4MHz, 2A, STEP DOWN DC-DC CONVERTER
AUR9716
General Description
The AUR9716 is a high efficiency step-down DC-DC
voltage converter. The chip operation is optimized by
peak-current mode architecture with built-in
synchronous power MOS switchers. It is
automatically switching between the normal PWM
mode and LDO mode to offer improved system
power efficiency covering a wide range of loading
conditions.
Switching frequency during 1.0MHz to 1.4MHz is set
by an external resistor and integrated soft-start (SS),
under-voltage-lock-out (UVLO), thermal shutdown
detection (TSD) and short circuit protection are
designed to provide reliable product applications.
The device is available in adjustable output voltage
versions ranging from 0.8V to VIN when input
voltage range is from 2.5V to 5.5V , and is able to
deliver up to 2A.
The AUR9716 is available in DFN-3×3-8 package.
Features
• High efficiency Buck Power Converter
• Low Quiescent Current
• 2A Output Current
• Low RDS(ON) Internal Switches: 110m
• Adjustable Output Voltage from 0.8V to VIN
• Wide Operating Voltage Range: 2.5V to 5.5V
• Built-in Power Switches for Synchronous
Rectification with high Efficiency
• 800mV Feedback Voltage Allows output
• Programmable Frequency: 1.0MHz to 1.4MHz
• Thermal Shutdown Protection
• Low Drop-out Operation at 100% Duty Cycle
• No Schottky Diode Required
Applications
• LCD TV
• Post DC-DC Voltage Regulation
• PDA and Notebook Computers
Apr. 2012 Rev. 1. 0
DFN-3×3-8
Figure 1. Package Type of AUR9716
BCD Semiconductor Manufacturing Limited
1

1 page




AUR9716 pdf
Data Sheet
1.0MHz to 1.4MHz, 2A, STEP DOWN DC-DC CONVERTER
AUR9716
Electrical Characteristics
VIN=5V, VFB=0.8V, fOSC=1.4MHz, L=1.5µH, CIN=10µF, COUT=10µF, TA=25°C, unless otherwise specified.
Parameter
Input Voltage Range
Shutdown Current
Active Current
Regulated Feedback Voltage
Regulated Output Voltage
Peak Inductor Current
Oscillator Frequency
P_MOSFET RON
N_MOSFET RON
EN Input High-Threshold
Voltage
EN Input Low-Threshold
Voltage
EN Input Current
Soft-start Time
Maximum Duty Cycle
Under Voltage Lock Out
Threshold
Thermal Shutdown
Error Amplifier
Conductance
Current Sense
Resistance
Trans
Trans
Symbol
VIN
IOFF
ION
VFB
VOUT
/VOUT
IPK
fOSC
RDSON(P)
RDSON(N)
VENH
VENL
IEN
tSS
DMAX
VUVLO
TSD
gm
RT
Test Condition
VEN=0V
VFB=0.95V
For adjustable output voltage
VIN=2.5V to 5.5V,
IOUT=0A to 2A
VFB=0.7V
ROSC=5.1M
Adjustable switching frequency
ISW=0.5A
ISW=0.5A
Enable Threshold
Shutdown Threshold
VIN Rising
VIN Falling
Hysteresis
Hysteresis=30°C
Min
2.5
0.784
-3
2.2
1.12
1.0
90
90
1.5
100
Typ Max Unit
5.5 V
0.1 1 µA
460 µA
0.8 0.816 V
3%
3.2 3.7 A
1.4 1.68
MHz
1.4
110 130 m
110 130 m
V
0.4 V
2 µA
800 µs
%
2.4
2.3 V
0.1
150 °C
3000
µs
5
Apr. 2012 Rev. 1. 0
BCD Semiconductor Manufacturing Limited
5

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AUR9716 arduino
Data Sheet
1.0MHz to 1.4MHz, 2A, STEP DOWN DC-DC CONVERTER
AUR9716
Application Information (Continued)
5. Slope Compensation
The slope compensation of AUR9716 provides stability
in constant frequency construction by preventing
oscillations at duty cycle more than 50%. It’s
accomplished externally by adding a series of capacitor
and resistor, as shown in Figure 24.
Then the cross over frequency often sets at 1/5 to 1/10
of the switching frequency.
Table 1 shows some calculated results based on stability
compensation equations above.
Switching Frequency
(MHz)
1.4
1.2
1.0
RCOMP (k)
CCOMP (nF)
L (µH)
4.3 4.3 3.6
1 1 1.5
1.5 1.5 2.2
COUT (µF)
10 10 10
Table 1. Stability Compensation Components
Figure 24. Stability Compensation Components
The DC loop gain of the system is determined by the
following equation:
AVDC
=
VFB
I OUT
AV GCS ,
Where AV is error amplifier voltage gain and GCS is
current sense transconductance.
To optimize the components for stability compensation
listed in Table 1, we will introduce the selection value of
RCOMP and CCOMP as detail as possible.
1. RCOMP: determine this resistor value according to
the desired crossover frequency is fC, default as 1.4MHz.
RCOMP
=
2πCOUT fC
GEAGCS
VOUT
VFB
2. CCOMP: determine this capacitor value according to
the desired phase margin. We often choose this
compensation.
The dominant pole P1 is due to CCOMP:
f P1
=
GEA
2πAV CCOMP
,
Where GEA is error amplifier transconductance.
The output pole P2 is due to COUT:
fP2
=
IOUT
2πVOUT C OUT
The zero Z1 is due to CCOMP and RCOMP:
fZ1
=
1
2πRCOMP CCOMP
If CCOMP2 is used, the third pole is due to RCOMP and
CCOMP2:
fP3
=
1
2πRCOMP CCOMP 2
Zero point below one forth of the crossover frequency to
ensure the loop stability.
CCOMP
>
4
2πRCOMP
fC
6. Short-Circuit Protection
When AUR9716 output node is shorted to GND, as
VFB drops under 0.4V, chip will enter soft-start to
protect itself, when short circuit is removed, and VFB
rises over 0.4V, the AUR9716 enters normal
operation again. If AUR9716 reaches OCP threshold
while short circuit, it will enter soft-start cycle until
the current under OCP threshold. When AUR9716 is
used to transfer VIN=5V to VOUT=2.5V, shorting VOUT
to GND makes big current which enables SCP
protection. The waveform is shown in Figure 25.
Apr. 2012 Rev. 1. 0
BCD Semiconductor Manufacturing Limited
11

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