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PDF LTC4370 Data sheet ( Hoja de datos )
| Número de pieza | LTC4370 | |
| Descripción | Two-Supply Diode-OR Current Balancing Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC4370
Two-Supply Diode-OR
Current Balancing Controller
Fea ures
n Shares Load Between Two Supplies
n Eliminates Need for Active Control of
Input Supplies
n No Share Bus Required
n Blocks Reverse Current
n No Shoot-Through Current During Start-Up or Faults
n 0V to 18V High Side Operation
n Enable Inputs
n MOSFET On Status Outputs
n Dual Ideal Diode Mode
n 16-Lead DFN (4mm × 3mm) and MSOP Packages
pplica ions
n Redundant Power Supplies
n High Availability Systems and Servers
n Telecom and Network Infrastructure
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
PowerPath and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners. Protected by U.S. Patents, including 7920013 and
8022679. Additional patent pending.
Descrip ion
The LTC®4370 is a two-supply current sharing controller
which incorporates MOSFET ideal diodes. The diodes
block reverse and shoot-through currents during start-up
and fault conditions. Their forward voltage is adjusted to
share the load currents between supplies. Unlike other
sharing methods, neither a share bus nor trim pins on
the supply are required.
The maximum MOSFET voltage drop can be set with a
resistor. A fast gate turn-on reduces the load voltage
droop during supply switchover. If the input supply fails
or is shorted, a fast turn-off minimizes reverse current
transients.
The controller operates with supplies from 2.9V to 18V.
For lower rail voltages, an external supply is needed at
the VCC pin. Enable inputs can be used to turn off the
MOSFET and put the controller in a low current state.
Status outputs indicate whether the MOSFETs are on or
off. The load sharing function can be disabled to turn the
LTC4370 into a dual ideal diode controller.
Typical
VINA
12V
pplica ion
12V, 10A Load Share
39nF*
SUM85N03-06P
0.1µF
NC
EN1 CPO1
VCC
GND
RANGE
VIN1 GATE1
OUT1
LTC4370
FETON1
FETON2
OUT2
EN2 CPO2
VIN2 GATE2 COMP
39nF*
VINB
12V SUM85N03-06P
*OPTIONAL, FOR FAST TURN-ON
2mΩ
2mΩ
OUT
12V, 10A
0.18µF
4370 TA01
Current Sharing Error vs Supply Difference
20
15
10
5
0
–5
–10
–15
–20
–750
–500
–250 0 250
VINA – VINB (mV)
500 750
4370 TA01b
4370f
1
http://www.Datasheet4U.com
1 page  
LTC4370
Typical er or ance harac eris ics TA = 25°C, VIN1 = VIN2 = 12V, OUT = VIN, VCC open,
unless otherwise noted.
�VGATE Voltage vs Current
15
12
9 VIN = 18V
6
3 VIN = 2.9V
0
�VGATE and VCC Voltages
vs VIN Voltage
14
12 ∆VGATE
10
8
6 VCC
4
2
–3
0
–20 –40 –60 –80 –100 –120
IGATE (µA)
4370 G06
0
0 3 6 9 12 15 18
VIN (V)
4370 G07
Maximum Forward Regulation
Voltage vs RANGE Resistor
700
600
500
400
300
200
100
0
0 20 40 60 80 100
RRANGE (kΩ)
4370 G08
Error Amplifier Transfer
Characteristic
30
20
10
0
–10
–20
–30
–300
–200
–100 0 100
VOUT1 – VOUT2 (mV)
200 300
4370 G09
FETON Output Low Voltage
vs Current
700
600
500
400
300
200
100
0
01234
IFETON (mA)
5
4370 G10
FETON Output High Voltage
vs Current
5
4
3
2
1
0
0 –2 –4 –6 –8 –10
IFETON (µA)
4370 G11
4370f
5
5 Page 
LTC4370
pplica ions n or a ion
in the absence of load current the differential input volt-
age to the error amplifier is zero and the COMP current is
gm(EA) • VEA(OS). Before sharing can start, the COMP
voltage has to slew towards its operating point of 0.7V
(when VIN1 < VIN2) or 1.24V (VIN1 > VIN2). This delay is
determined by the differential input signal to the error
amplifier (which is ΔVOUT = OUT1 – OUT2 = (I1 − I2) • RS),
its gm and the COMP capacitor value. Depending on how
the currents split before converging, the delay can vary
from 1 to 5 times:
CC • ΔVCOMP
gm(EA) • IL • RS
Figure 4 a shows the case where a 5.1 V VIN1 is turned
on while VIN2 is at 4.9V supplying 10A. Initially, COMP
is railed low to 0.1V since ΔVOUT (−I2 • RS) is negative,
and needs to rise to 1.24V as the final VIN1 is higher than
VIN2. With VIN1 off, ΔVIN is large and negative, causing the
forward regulation voltage of the second supply VFR2 to be
folded back to the minimum VFR(MIN) (travelling from left
to right in Figure 2a). As the ΔVIN magnitude decreases,
VFR2 rises to the maximum VFR(MAX), lowering I2 and the
load voltage. COMP is around 0.7V when VFR2 is being
adjusted. When COMP reaches 1.24V, VFR2 is kept at the
minimumand VFR1 is adjustedappropriatelyto compensate
for the 0.2V of ΔVIN. The sharing closure is smoother for
the case where VIN1 < VIN2 since COMP only has to slew
to 0.7V to lower VFR2 (Figure 4b).
MOSFET Selection
The LTC4370 drives N-channel MOSFETs to conduct the
load current. The important parameters of the MOSFET
are its maximum drain-source voltage BVDSS, maximum
gate-source voltage VGS(MAX), on-resistance RDS(ON), and
maximum power dissipation PD(MAX).
If an input is connected to ground, the full supply voltage
can appear across the MOSFET. Tosurvive this, the BVDSS
must be higher than the supply voltages. The VGS(MAX)
rating of the MOSFET should exceed 14V since that is the
upper limit of the internal GATE to VIN clamp.
Toobtain the maximum sharing capture range, the RDS(ON)
shouldbe low enoughfor the servo amplifierto regulatethe
minimum forward regulation voltage across the MOSFET
while it’s conducting half of the load current. If it cannot,
the gatevoltagewillbe railedhigh.Hence,the RDS(ON) value
in the MOSFET data sheet should be looked up for 10V or
4.5V gate drive depending on the VIN voltage. Since the
OUT voltages are equal, the breakpoint for exact sharing
in the higher RDS(ON) case is:
ΔVIN(SH) = VFR(MAX) – 0.5IL • RDS(ON)
(2)
CURRENT
5A/DIV
I2
I1
VIN1 = 5.1V
VIN2 = 4.9V
IL = 10A
CURRENT
5A/DIV
I2
I1
VIN1 = 4.9V
VIN2 = 5.1V
IL = 10A
VOLTAGE
2V/DIV
OUT
VIN1
COMP
(1V/DIV)
VOLTAGE
2V/DIV
OUT
VIN1
COMP
(0.5V/DIV)
25ms/DIV
(4a) VIN1 > VIN2
4370 F04a
Figure 4. Start of Sharing at VIN1 Turn-On
25ms/DIV
(4b) VIN1 < VIN2
4370 F04b
4370f
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet LTC4370.PDF ] | |
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