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IRS4427SPbF Schematic ( PDF Datasheet ) - International Rectifier

Teilenummer IRS4427SPbF
Beschreibung DUAL LOW SIDE DRIVER
Hersteller International Rectifier
Logo International Rectifier Logo 




Gesamt 19 Seiten
IRS4427SPbF Datasheet, Funktion
Data Sheet No. PD60278
IRS4426/IRS4427/IRS4428(S)PbF
Features
Gate drive supply range from 6 V to 20 V
CMOS Schmitt-triggered inputs
Matched propagation delay for both channels
Outputs out of phase with inputs (IRS4426)
Outputs in phase with inputs (IRS4427)
OutputA out of phase with inputA and
outputB in phase with inputB (IRS4428)
RoHS compliant
Descriptions
The IRS4426/IRS4427/IRS4428 are low voltage,
high speed power MOSFET and IGBT driver. Pro-
prietary latch immune CMOS technologies en-
able rugged ized mono lithic construction. Logic
inputs are compatible with standard CMOS or
LSTTL outputs. The output drivers feature a high
pu lse curren t buffer stage de signed for mini-
mum driver cross-condu ction . Propaga tion
de lays be tween two channels are matched.
DUAL LOW SIDE DRIVER
Product Summary
IO+/-
VOUT
ton/off (typ.)
1.5 A / 1.5 A
6 V - 20 V
50 ns & 50 ns
Packages
8 Lead PDIP
8-Lead SOIC
Block Diagram
1
NC
8
NC
2
INA
7
OUTA
3
GND
6
Vs
4
INB
5
OUTB
TO
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IRS4427SPbF Datasheet, Funktion
IRS4426/IRS4427/IRS4428(S)PbF
Functional Block Diagram IRS4428
5V
INA
PREDRV
DRV
INB
PREDRV
DRV
Vs
OUTA
Vs
OUTB
GND
Lead Definitions
Symbol Description
VS
GND
Supply voltage
Ground
INA Logic input for gate driver output (OUTA), out of phase (IRS4426, IRS4428), in phase (IRS4427)
INB Logic input for gate driver output (OUTB), out of phase (IRS4426), in phase (IRS4427, IRS4428)
OUTA Gate drive output A
OUTB Gate drive output B
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IRS4427SPbF pdf, datenblatt
IRS4426/IRS4427/IRS4428(S)PbF
30
20
Max.
10
Ty p.
0
-50 -25
0 25 50 75
Temperature (o C)
100 125
Figure 8A. Logic "1" Input Bias Current vs.
Temperature
30
20
Max.
10
Typ.
0
10 12 14 16 18 20
Supply Voltage (V)
Figure 8B. Logic "1" Input Bias Current
vs. Supply Voltage
50
40
Max.
30
20
Typ.
10
0
-50 -25
0 25 50 75 100 125
Temperature (o C)
Figure 9A. Logic "0" Input Bias Cur rent
vs. Temperature
50
40
Max.
30
20
Typ.
10
0
10 12 14 16 18
Supply Voltage (V)
Figure 9B. Logic "0" Input Bias Curr ent
vs. Supply Voltage
20
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