ADF4360 Datasheet PDF - Analog Devices
| Part Number | ADF4360 | |
| Description | Integrated Synthesizer and VCO | |
| Manufacturers | Analog Devices | |
| Logo |  |
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PRELIMINARY TECHNICAL DATA
a
Integrated Synthesizer and VCO
Preliminary Technical Data
ADF4360
FEATURES
GENERAL DESCRIPTION
Six Output Ranges:
2000 MHz to 2550 MHz
1700 MHz to 2150 MHz
1600 MHz to 1950 MHz
1400 MHz to 1800 MHz
1150 MHz to 1400 MHz
1000 MHz to 1250 MHz
External L for Lower Frequencies
Divide-by-2 output
+2.7 V to +3.3V Power Supply
1.8 V Logic Compatibility
The ADF4360 family is a fully integrated integer-N
synthesizer and voltage controlled oscillator (VCO). The
user has the choice of seven output frequency ranges; the
ADF4360-1 is designed for a center frequency of
2400MHz, the ADF4360-2 for 2000MHz, the ADF4360-
3 for 1800 MHz, the ADF4360-4 for 1600MHz, the
ADF4360-5 for 1300MHz and the ADF4360-6 for 1150
MHz. The ADF4360-7 center frequency is set by external
inductors.
Integer-N Synthesizer
In addition, there is a divide-by-2 option available,
Programmable Dual Modulus Prescaler
8/9, 16/17, 32/33
Programmable Output Power Level
Programmable Core Power Level
3-Wire Serial Interface
whereby the user gets an RF output center frequency of
either 1200MHz (ADF4360-1), 1000MHz (ADF4360-2),
900 MHz (ADF4360-3) etc.
Control of all the on-chip registers is via a simple 3-wire
Analog and Digital Lock Detect
interface. The device operates with a power supply rang-
Hardware and Software Power Down Mode
ing from 2.7V to 3.3V and can be powered down when not
APPLICATIONS
in use.
Wireless Handsets (DECT, GSM, PCS, DCS, WCDMA)
Test Equipment
Wireless LANS
CATV Equipment
ADF4360-1/2/3/4/5/6 FUNCTIONAL BLOCK DIAGRAM
AVDD
DVDD
CE
RSET
ADF4360-1/2/3/4/5/6
REFIN
CLK
DATA
LE
14-BIT
R COUNTER
24-BIT
DATA REGISTER
24-BIT
FUNCTION
LATCH
LOCK
DETECT
MULTIPLEXER
CHARGE
PUMP
PHASE
COMPARATOR
MUXOUT
CP
VVCO
VTUNE
CC
CN
INTEGER
REGISTER
13-BIT B
COUNTER
+
PRESCALER
LOAD
-
P/P+1
LOAD
6-BIT A
COUNTER
N = (BP + A)
VCO
CORE
OUTPUT
STAGE
RFOUT A
RFOUT B
÷2
AGND
DGND
CPGND
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
REV. PrP 01/03
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 2003
http://www.Datasheet4U.com
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PRELIMINARY TECHNICAL DATA
ADF4360
Mnemonic
AVDD
DVDD
RSET
PIN DESCRIPTION
Function
Analog Power Supply. This may range from 2.7V to 3.3V. Decoupling capacitors to the analog ground
plane should be placed as close as possible to this pin. AV
DD must be the same value as DV DD.
Digital Power Supply. This may range from 2.7V to 3.3V. Decoupling capacitors to the digital ground
plane should be placed as close as possible to this pin. DV
DD must be the same value as AV DD.
Connecting a resistor between this pin and CPGND sets the maximum charge pump output current for
the synthesizer. The nominal voltage potential at the R
and R SET is
SET pin is 0.6V. The relationship between I
11.75
ICPmax = RSET
CP
MUXOUT
CP
VVCO
VTUNE
L1
L2
CC
CN
RFOUTA
RFOUTB
CPGND
DGND
AGND
So, with R SET = 4.7k Ω, I CPmax = 2.5mA.
This multiplexer output allows either the Lock Detect, the scaled RF or the scaled Reference Frequency
to be accessed externally.
Charge Pump Output. When enabled this provides ±I
the internal VCO.
CP to the external loop filter, which in turn drives
Power supply for the VCO. This may range from 2.7V to 3.3V. Decoupling capacitors to the analog
ground plane should be placed as close as possible to this pin. V
VCO must be the same value as AV
Control input to the VCO. This voltage determines the output frequency and is derived from filtering
the CP OUT voltage.
ADF4360-7 only. An external inductor should be connected to this pin to set the ADF4360-7 output
frequency.
DD.
ADF4360-7 only. An external inductor should be connected to this pin to set the ADF4360-7 output
frequency.
Internal compensation node. This pin must be decoupled to ground with a 10nF capacitor.
Internal compensation node. This pin must be decoupled to V VCO with a 10uF capacitor.
VCO output. The output level is programmable from -3dBm to -12dBm.
VCO complementary output. The output level is programmable from -3dBm to -12dBm.
Charge Pump Ground. This is the ground return path for the charge pump.
Digital Ground.
Analog Ground. This is the ground return path of the prescaler & VCO.
LE
DATA
CLK
CE
REFIN
Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into
one of the four latches, the latch being selected using the control bits.
Serial Data Input. The serial data is loaded MSB first with the two LSBs being the control bits. This
input is a high impedance CMOS input.
Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is
latched into the 24-bit shift register on the CLK rising edge. This input is a high impedance CMOS
input.
Chip Enable. A logic low on this pin powers down the device and puts the charge pump into three state
mode. Taking the pin high will power up the device depending on the status of the power-down bits.
Reference Input. This is a CMOS input with a nominal threshold of V
DD/2 and a dc equivalent input
resistance of 100k Ω. See Figure 2. This input can be driven from a TTL or CMOS crystal oscillator or
it can be ac coupled.
–5– REV. PrP 01/03
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| Information | Total 17 Pages | |
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| Download | [ ADF4360.PDF Datasheet ] | |
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| ADF4360-0 | The function is Integrated Synthesizer and VCO. Analog Devices | |
| ADF4360-1 | The function is Integrated Synthesizer and VCO. Analog Devices | |
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