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PDF CS48LV13 Data sheet ( Hoja de datos )
| Número de pieza | CS48LV13 | |
| Descripción | Ultralow Power HD Voice Processors | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CS48LV12/13
Ultralow Power HD Voice Processors,
Featuring SoundClear® Technology
Overview of Features
• Complete easy-to-implement voice solution including all
essential voice, audio, and speech DSP features for
flagship smartphones, tablets, and computing products
• SoundClear Voice™ noise reduction, echo cancellation,
and voice enhancement
• RAPID2™ GUI-based diagnostic and tuning tool for ease
of design-in
• Media postprocessing support
—Integrated Cirrus Logic playback enhancement for
speakers and headphones
—Optional Dolby® and DTS® playback enhancement 1
• ASR Enhance™ automatic speech recognition (ASR)
preprocessing for increased ASR accuracy in noisy
environments
• Voice activity detector (VAD) enables always-on speech
recognition
• TrulyHandsfree™ voice control by Sensory, Inc.
supported
• Powerful 130-MHz dual-MAC 32-bit DSP core
• Ultralow power consumption (core typically <8 mW @ 1 V
during narrowband call)
•I 2S, I2C, SPI™ digital connectivity
1. Use of TrulyHandsfree-, Dolby-, or DTS-supported features requires the existence and proof of a valid license agreement with the
corresponding company to be able to use or distribute its technology in any finished end-user or ready-to-use final product.
RESET
BUSY
I2S
Raw
PGA
Noise
Reduction
Acoustic Echo Canceller
Residual Echo Suppressor
NLP
Spectrally Matched
Comfort Noise
Dynamic
FlexEQ
ALC
PGA
I2S
PCM Clean
PCM
Full-Duplex Control+ Voice Activity Detection+ Double Talk Detection
CLK
I2S
Clean
PCM
Near
End
PGA
Comfort
Noise
Automatic Volume
Control
Automatic Level
Control
Dynamic
FlexEQ
Noise
Reduction
PGA
Media Processor
GND
VD
VL
Debug
MCLK
Optional
CS48LV12 Block Diagram
SPI /I2C
I2S
Raw
PCM
INT
Far
End
http://www.cirrus.com
Copyright Cirrus Logic, Inc. 2014
(All Rights Reserved)
DS1057F1
FEB
‘14http://www.Datasheet4U.com
1 page  
1 Documentation
1 Documentation
This document describes the CS48LV12 and CS48LV13 HD voice processors. When evaluating or designing a system
around the CS48LV12/13 processors, use this document in conjunction with the documents listed in Table 1-1.
Table 1-1. CS48LV12/13 Related Documentation
Document Name
CS48LV12/13 Data Sheet
RAPID2™ User’s Guide
DSPComposer™ User’s Manual for
CS48LV12/13
CS48L10 Hardware User’s Manual
CRD48L10 4in4out Board Manual
Micro-condensers User’s Guide
AN344
AN344CBE
AN344CBV
AN344CVT
AN344EQ
AN344TC
Description
This document
Instructional manual for using the RAPID2 tool for voice processing diagnostics and tuning
Manual for using the CS48LV12/13 version of DSP composer™ tool for post-processing
configuration and tuning
Includes detailed system design information including typical connection diagrams and boot
procedures applicable for CS48L10/L11/LV12/LV13
Manual for development and evaluation board for CS48L10/L11/LV12/LV13
Instructional manual for using Micro-condenser for creating microcode and flash image for
embedded systems applications
Firmware User’s Manual for CS48L10/L11/LV12/LV13
Applications note for Cirrus Bass Enhancement (CBE) Module
Applications note for Cirrus Bass Virtualization (CBV) Module
Applications note for Cirrus Virtualization Technology (CVT)
Applications note for Cirrus Equalization (EQ) Module
Applications note for Tone Control Post-processor Module
The primary scope of this document is to provide the hardware specifications of the CS48LV12/13 family of devices. These
include hardware functionality, characteristic data, pinout, and packaging information. The intended audience includes
system PCB designers, MCU programmers, and quality-control engineers.
2 Overview
The CS48LV12 and CS48LV13 products are based on Cirrus Logic 32 bit fixed point DSP's which feature the ultralow
power, tiny foot print, high performance and low cost that is required by today's mobile voice communication products. For
ease of implementation and high computational efficiency, each product includes an embedded software package highly
optimized for the DSP. Designed into each product is the ability to support multiple modes and configurations that match
an array of product use models for smartphones, tablets, and mobile computing devices as well as a variety of consumer
and automotive products with hands-free communication features.
The CS48LV12 incorporates Cirrus Logic SoundClear technology to perform all voice processing functions typically
required in handset and hands-free products including noise reduction, echo cancellation, and a comprehensive set of
voice enhancement capabilities. SoundClear technology uses proprietary algorithms to decipher spatial and spectral
characteristics of both the Rx (far-end) and Tx (near-end) digital voice streams and categorize various types of noise and
speech, removing noise and competing talkers while automatically adjusting for SPL changes, changes in product position
and orientation, and ongoing environmental changes. Other SoundClear modules monitor talk status (single Tx, single Rx,
silence, double-talk), cancel echo, suppress residual echo, and inject comfort noise if required to achieve natural,
consistent, full-duplex, echo-free conversation, in both hand-set and hands-free modes.
The CS48LV12 also includes integrated media processing capabilities to enhance audio playback over internal speakers
or attached devices such as speakers and headphones.
The CS48LV13 includes all the voice and media processing capabilities as well as ASR pre-processing (ASR Enhance)
to remove noise that limits ASR accuracy and reliability. It also includes a specialized Voice Activity Detector (VAD) that
enables the CS48LV13 to remain in a very low power "always-on" state until the VAD detects human speech in the
proximity of a microphone. This feature is typically used in conjunction with a local ASR solution such as the CS48LV13's
optional Sensory TrulyHandsfree voice control.
The CS48LV13 also supports several optional features requiring third party licenses:
• Sensory, Inc. TrulyHandsfree voice control
• Dolby, Inc. media playback enhancement algorithms
• DTS, Inc. media playback enhancement algorithms
5 DS1057F1
5 Page 
3.13 Speech DSP Chain
3.13 Speech DSP Chain
The CS48LV13 includes Cirrus Logic ASR Enhance preprocessor that removes noise impacting ASR engine
performance. SoundClear ASR Enhance algorithms use specialized spatial NR techniques to improve command success
rate by accomplishing the following:
• Reducing near-end noise that masks speech pauses and otherwise interferes with accuracy
• Suppressing cross-talk from competing talkers in the vicinity
• Preserving voice spectral content
• Preventing phoneme degradation
• Using InstantAdapt™ noise adaption to avoid missed or truncated commands
The ASR Enhance preprocessor can be used to improve local ASR performance including the optional Sensory
TrulyHandsfree voice control as well as cloud based engines.
The CS48LV13 supports an optional speech chain, which can include the following functions:
• Cirrus Logic voice activity detector (VAD). This specialized VAD enables always-on ultralow-power voice trigger.
The VAD constantly monitors ambient sound while the CS48LV13 is in a very low power state. If it detects voice,
the VAD can trigger the supported Sensory TrulyHandsfree voice control engine running on the CS48LV13.
• Sensory TrulyHandsfree voice control. When the VAD has detected a voice, it can trigger TrulyHandsfree to detect
a predefined wake-up command. If it detects the proper command, it enters Voice-Command Mode to interpret any
command within its vocabulary. If the proper wake-up command is not detected, the device can return to its
always-on VAD mode.
3.14 On-chip DSP Peripherals
3.14.1 I2S Digital Audio Ports
3.14.1.1 I2S Digital Audio Input Ports (DAI)
Two DAI ports support PCM format with word lengths up to 32 bits and sample rates as high as 192 kHz. DAI_1 is typically
connected to a host processor, applications processor, or mobile SoC to receive Rx voice and audio data. DAI_2 is
typically connected to a codec or A/D streaming Tx voice or audio data captured from microphones. Both ports operate in
I2S slave clock mode using SCLK and LRCLK for bit-clock and word select. For voice (call) modes, both DAI ports use a
16-bit word length, a 8-KHz sample rate for narrowband calls, and 16-KHz sample rate for HD voice/wide-band calls. Rx
(downlink) requires one channel and Tx (requires one or two channels), depending on microphone/input mode. For
playback mode, other audio formats are supported, based on the content type and postprocessing algorithms applied.
3.14.1.2 I2S Digital Audio Output Port (DAO)
Two DAO ports support PCM format with word lengths up to 32 bits and sample rates as high as 192 kHz.
DAO_1 is typically connected to a host processor, applications processor or mobile SoC to transmit Tx voice and audio
data. DAO_2 is typically connected to a codec, D/A, or digital amp streaming Rx voice or audio data out to transducers
such as mobile phone receiver, speakers, or headphone. Both ports operate in I2S slave clock mode using SCLK and
LRCLK for bit clock and word select. For voice (call) modes both DAO ports will use a 16-bit word length, 8-KHz sample
rate for narrowband calls, and 16 KHz for HD voice/wide-band calls. For playback mode, other audio formats are
supported based on the content type and postprocessing algorithms being applied.
3.14.2 Serial Control Port (I2C or SPI)
The on-chip serial control port is capable of operating as slave in either I2C or SPI modes. Slave operation is chosen by
a mode select pin when the CS48LV12/13 comes out of reset. The serial clock pin can support frequencies as high as
25 MHz in SPI mode.
The slave SPI clock speed must always be (DSP Core Frequency/2).
11 DS1057F1
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| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet CS48LV13.PDF ] | |
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