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PDF HR1000A Data sheet ( Hoja de datos )

Número de pieza HR1000A
Descripción Resonant Half-Bridge Controller
Fabricantes MPS 
Logotipo MPS Logotipo



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HR1000A
The Future of Analog IC Technology
DESCRIPTION
The HR1000A is a controller designed specifically
for the reso nant half-bridge topolog y. It provide s
two drive -signal channels t
hat output
complementary signals at a 50% d uty cycle. An
internal f ixed dead-time of 350n s between the
two complementary gate signa ls guarante es
zero-voltage switching during the transient an d
enables high-frequency operation.
The integra ted bootstr ap diode simplifies th e
external driving circuit fo r the high-side switch. It
can withsta nd up to 600V with immunity agai nst
high dV/dt noise.
Modulating the switching frequency r egulates the
topology output voltage. A programmable
oscillator can set bo th the maximu m and
minimum switching frequencies.
The IC starts up at the programmed ma ximum
switching frequency and gradually slows until t he
control loo p takes over to prevent excessive
inrush current
The IC can be forced to enter a con trolled burst-
mode operation at lig ht-load to minimize the
power consumption and tighten output regulation.
Protections features—including latched shutdown,
auto-recovery, brown-o ut protectio n, and over-
temperature protection—improve converte
r
design sa fety without engendering addition al
circuit complexity.
The IC provi de 1.5A/2A source/sink capability for
both high-side and low-side gate drivers.
The HR1000A is available in a SO-16 package.
Resonant Half-Bridge Controller
FEATURES
50% Duty Cycle, Variable Frequency
Control For Resonant Half-Bridge Converter
600V High-Side Gate Driver with Integrated
Bootstrap Diode and High dV/dt Immunity
1.5A/2A Source/Sink Capability for Both
High-Side and Low-Side Gate Drivers
High-Accuracy Oscillator
Operates at up to 600kHz
Two-Level Over-Current Protection:
Frequency-Shift and Latched Shutdown with
Programmable Duration Time
Remote ON/OFF Con trol and Brown-Out
Protection through the BO Pin
Latched-Disable Input for Easy Pro tections
Implementation
Interfaces with PFC Controller
Programmable Burst-Mode Ope ration at
Light-Load
Non-Linear Soft-Start for Monotonic Output
Voltage Rise
SO-16 package
APPLICATIONS
LCD and PDP TVs
Desktop PCs and Servers
Telecom SMPS
AC-DC Adapter, Open-Frame SMPS
Video Game Consoles
Electronic Lighting Ballast
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit M PS website u nder Q uality Assurance. “MPS” and “ The
Future of An alog IC Technology” a re Re gistered T rademarks of Mo nolithic
Power Systems, Inc.
HR1000A Rev. 1.01
www.MonolithicPower.com
8/30/2012
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
1
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HR1000A pdf
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
ELECTRICAL CHARACTERISTICS (continued)
TJ=25°C, VCC=13V, CHG=CLG=1nF; CT=470pF, RFset=12k, unless otherwise specified.
Parameter
Symbol
Min
Typ
Max
Delayed shutdown (TIMER)
Charge current (VTIMER=1V, VCS=0.85V)
ICHARGE
80
130 180
Threshold for forced operation a
frequency
t maximum
Vth1
1.88
2
2.08
Shut down threshold
Restart threshold
Low-side gate driver (LG, referenced to GND)
Vth2 3.3 3.5 3.7
Vth3 0.25 0.3 0.35
Peak source current
Peak sink current
Sourcing resistor
Sinking resistor
Fall time
Rise time
UVLO saturation (VCC=0 to VCCH, Isink=2mA)
High side gate driver (HG, referenced to SW)
Isourcepk 1.5
Isinkpk 2
Rsource
Rsink
tf
tr
4
2
20
20
1.1
Peak source current
Peak sink current
Sourcing resistor
Isourcepk 1.5
Isinkpk 2
Rsource
4
Sinking resistor
Fall time
Rise time
Thermal Shutdown
Rsink
tf
tr
2
20
20
Thermal shutdown threshold
150
Thermal shutdown recovery threshold
120
Unit
µA
V
V
V
A
A
ns
ns
V
A
A
ns
ns
°C
°C
HR1000A Rev. 1.01
www.MonolithicPower.com
8/30/2012
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
5

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HR1000A arduino
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
PIN FUNCTIONS (continued)
Pin #
7
Name
BO
Description
Input Voltage Sense. Connect to the high-voltage input bus through the tap of a resistor
divider to perform either AC or DC (in systems with PFC) brownout protection. A voltage
below 1.25V shuts down (without latching) the IC, lowers its consumption and discharges
the soft-start capacitor. The IC operation resumes (with soft-start) when the voltage
exceeds 1.25V. The comparator has current hysteresis: An internal 12µA current source is
ON as long as the applied voltage is below 1.25V, and is OFF if this value is exceeded.
Bypass the pin with a capacitor to GND to reduce noise pick-up. An internal Zener diode
top-limits the pin voltage. Activating the Zener diode causes the IC to shut down (without
latching). Bias the pin between 1.25V and 5.5V if the function is not used.
IC Latch. Connects internally to a comparator that—when the pin voltage exceeds 1.85V—
8
LATCH
shuts the IC down and brings its consumption to near pre-start-up levels. The latch is
removed as the VCC voltage goes below the UVLO threshold. Tie the pin to GND if the
function is not used.
Interface to the front-end PFC. This pin—normally high—stops the PFC controller for
protection purposes or during burst-mode operation. It goes low when the IC shuts down
9
PFC
from the following conditions: VCC > 16V, LATCH > 1.85V, CS > 1.5V, BO > 5.5V, thermal
shutdown and BURST < 1.25V. The pin also goes low when the voltage on TIMER
exceeds 2V, and goes back open as the voltage falls below 0.3V. During UVLO, it is open.
Leave the pin unconnected if not used.
Ground. Current return for both the low-side gate-driver current and the IC bias current. Tie
10 GND all bias component ground connections to a trace to this pin. Keep separate from any
pulsed current return.
Low-Side Gate Driver. The driver is capable of a minimum 0.5A source and a minimum 1A
11 LG sink-peak current to drive the lower MOSFET of the half-bridge leg. The pin is actively
pulled to GND during UVLO.
12
VCC
Supply Voltage. Supplies both the IC signal and the low-side g ate driver. Sometime s a
small bypass capacitor (e.g., 0.1µF) can help provide a clean bias voltage for the IC signal.
13
N.C.
High-Voltage Space r. Not internally co nnected—isolates the hig h-voltage pin and ea ses
compliance with safety regulations (creepage-distance) on the PCB.
14
SW
High-Side S witch Sou rce. Current ret urn fo r the h igh-side g ate-drive current. Requires
careful layout to avoid large spikes below ground.
High-Side Floating Gate-Driver. Capable of minimum 0.5A source and minimum 1A sink-
15 HG peak current to drive the upper MOSFET of the half-bridge leg. An internal resistor
connected to pin 14 (SW) ensures that the pin does not floating during UVLO.
High-Side Gate Driver for Floating Voltage Supply. Connect a bootstrap capacitor between
16 BST this pin and pin 14 (SW)—fed by an internal bootstrap diode driven in-phase with the low-
side gate-drive.
HR1000A Rev. 1.01
www.MonolithicPower.com
8/30/2012
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
11

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