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PDF AK4612 Data sheet ( Hoja de datos )

Número de pieza AK4612
Descripción 6-8-Channel Audio CODEC
Fabricantes AKM 
Logotipo AKM Logotipo



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[AK4612]
AK4612
6/8-Channel Audio CODEC
GENERAL DESCRIPTION
The AK4612 is a single chip audio CODEC that includes six ADC channels and eight DAC channels. The
converters are designed with Enhanced Dual Bit architecture for the ADC’s, and Advanced Multi-Bit
architecture for the DAC, enabling very low noise performance. Fabricated on a low power process, the
AK4612 operates off of a +3.3V analog supply and a +1.8V digital supply. The AK4612 supports both
single-ended and differential inputs and outputs. A wide range of applications can be realized, including
home theater, pro audio and car audio. The AK4612 is available in an 80-pin LQFP package.
FEATURES
1. 6channel 24bit ADC
- 128x Oversampling
- Linear Phase Digital Anti-Alias Filter
- Analog Anti-Alias Filter for Single-Ended Input and Differential Input
- ADC S/(N+D)
92dB: Single-Ended Input
97dB: Differential Input
- ADC DR, S/N
103dB: Single-Ended Input
104dB:
Differential Input
- Digital HPF for offset cancellation
- I/F format: MSB justified, I2S or TDM
- Overflow flag
2. 8channel 24bit DAC
- 128x Oversampling
- Linear Phase 24bit 8 times Digital Filter
- Analog Smoothing Filter for Single-Ended Output
- DAC S/(N+D)
94dB: Single-Ended Output
100dB:
Differential Output
- DAC DR, S/N
105dB: Single-Ended Output
108dB: Differential Output
- Individual channel digital volume with 256 levels and 0.5dB steps
- Soft mute
- De-emphasis for 32kHz, 44.1kHz and 48kHz
- Zero Detect Function
- I/F format: MSB justified, LSB justified (16bit, 20bit, 24bit), I2S or TDM
3. Sampling Frequency
- Normal Speed Mode: 32kHz to 48kHz
- Double Speed Mode: 64kHz to 96kHz
- Quad Speed Mode: 128kHz to 192kHz
4. Master / Slave mode
MS1039-E-02
-
1-
2009/06
http://www.Datasheet4U.com

1 page




AK4612 pdf
Compatibility with AK4628
1. Func tions
Function AK4628
Number of ADC channel
Number of DAC channel
Input
Output
I/F Format
TDM512
XTAL OSC
Parallel / Serial Select Pin
Control Data Output Pin
Ta
Package
2-channel
8-channel
Single
Single
I2S, LJ, RJ(20/24bit), TDM
No
No
Yes
No
-40 +85°C
44pinLQFP
2. Power Supply
Voltage Name
AVDD
AVDD1
AVDD2
DVDD
TVDD
TVDD1
TVDD2
AK4628
4.5 5.5V
No
No
4.5 5.5V
2.7 5.5V
No
No
3. Specification
Parameter AK4628
Fs (AD/DA)
THD+N (AD/DA)
S/N (AD/DA)
Output DATT
µP I/F
96k / 192k
Single: 92 / 90
Differential : - / -
Single: 102 / 106
Differential : - / -
128 level
100k I2C, 3wire
[AK4612]
AK4612
6-channel
8-channel
Single or Diff
Single or Diff
I2S, LJ, RJ(16/20/24bit), TDM
Fs=48kHz
Yes
No
Yes
-40 +105°C
80pinLQFP
AK4612
No
3.0 3.6V
3.0 3.6V
1.6 2.0V
No
1.6 3.6V
1.6 3.6V
AK4612
192k / 192k
Single: 92 / 94
Differential : 97 / 100
Single: 103 / 105
Differential: 104 / 108
256 level
400k I2C, 4wire
MS1039-E-02
-
5-
2009/06

5 Page





AK4612 arduino
[AK4612]
DAC Analog Output Characteristics (differential outputs)
S/(N+D)
fs=48kHz
BW=20kHz
0dBFS 90
-60dBFS
100
45
dB
fs=96kHz
BW=40kHz
0dBFS 88
-60dBFS
98
42
fs=192kHz
BW=40kHz
0dBFS
-60dBFS
98
42
DR (-60dBFS with A-weighted)
100 108
dB
S/N (A-weighted)
100 10
8
dB
Interchannel Isolation
90 110
dB
Interchannel Gain Mismatch
0 0.5 dB
Gain Drift
Output Voltage
AOUT=0.63xVREFH2 (Note 8)
20
±1.87 ±2
.08 ±2
- ppm/°C
.29 Vpp
Load Resistance
Load Capacitance
(Note 10)
2
kΩ
30 pF
Power Supply Rejection
(Note 7)
50
dB
Note 7. PSR is applied to AVDD1, AVDD2, DVDD, TVDD1 and TVDD2 with 1kHz, 50mVpp. VREFH1 and VREFH2
pins are held a constant voltage +3.3V.
Note 8. This value is (LIN+) – (LIN-) and (RIN+) – (RIN-). The voltage is proportional to VREFH1, VREFH2 voltage.
Note 9. VREFH1 and VREFH2 are held +3.3V, the input bias voltage is set to AVDD1, 2 x 0.5. The 1kHz, 0.96Vpp
signal is applied to LIN- and LIN+ with same phase (e.g. shorted) or RIN- and RIN+. The CMRR is measured as
the attenuation level from 0dB = -7dBFS (since the normal 0.96Vpp = -7dBFS). This value is guaranteed but not
tested.
Note 10. For AC-load. In the case of DC-load is 5k.
Note 11. This value is Load Capacitance for output pin to GND. In differential mode, this value should be estimated to be
twice, because Load Capacitance exists to GND and between the differential pin.
Parameter min
Power Supplies
Power Supply Current
Normal Operation (PDN pin = “H”)
AVDD1+AVDD2
fs=48kHz, 96kHz, 192kHz
DVDD
fs=48kHz
fs=96kHz
fs=192kHz
TVDD1+TVDD2
fs=48kHz
fs=96kHz
fs=192kHz
Power-down mode
(PDN pin = “L”, DVMPD = “ L”)
(Note 12)
AVDD1+AVDD2+DVDD+TVDD1+TVDD2
(PDN pin = “L”, DVMPD = “ H”)
(Note 12)
AVDD1+AVDD2+DVDD+TVDD1+TVDD2
typ max Units
76.0
125.0
mA
16.0 24.0 mA
22.0 35.0 mA
35.0 55.0 mA
6.0 8.0 mA
7.0 9.5 mA
7.0 9.5 mA
200 550 µA
10 200 µA
Note 12. In the power-down mode, all digital input pins including clock pins are held VSS3 (TST1, TST3, TST4, TST5,
CAD0, CAD1, I2C, CSN, CCLK, CDTI pins), VSS4 (TST2, M/S, MCKI, LRCK, BICK, SDTI1, SDTI2, SDTI3,
SDTI4,TST7, TST8).
MS1039-E-02
-
11 -
2009/06

11 Page







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