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AK1590 Schematic ( PDF Datasheet ) - AKM

Teilenummer AK1590
Beschreibung 1GHz Delta-Sigma Fractional-N Frequency Synthesizer
Hersteller AKM
Logo AKM Logo 




Gesamt 30 Seiten
AK1590 Datasheet, Funktion
[AK1590]
AK1590
1GHz Delta-Sigma Fractional-N Frequency Synthesizer
1. Overview
AK1590 is a Delta-Sigma Fractional-N PLL (Phase Locked Loop) frequency synthesizer with a frequency switching
function, covering a wide range of frequencies from 60 to 1000MHz. This product consists of an 18-bit Delta-Sigma
modulator, a low-noise phase frequency comparator, a highly accurate charge pump, a reference divider, dual-module
prescaler (P/P+1) and frequency offset adjustable circuits.
2. Features
Operating frequency:
Programmable charge pump current:
60 to 1000MHz
In a normal operating scheme, the charge pump current can be set
in 8 steps, in the range from 20 to 168μA.
In a Fast Lockup scheme, the charge pump current can be set in
8 steps, in the range from 0.8 to 2.3mA.
Supply Voltage:
2.7 to 5.5 V (PVDD pin)
Separate power supply for the charge pump: PVDD to 5.5V (CPVDD pin)
On-chip power-saving features
Frequency offset adjustable function:
No glitch operation for AFC(Automatic Frequency Control) and
DFM(Digital Frequency Modulation);
When the offset adjustable register is accessed, INT and NUM are
General-purpose output:
recalculated internally.
Two general-purpose output ports to control peripheral parts
Low phase noise:
Low consumption current:
Package:
Operating temperature:
-201dBc/Hz
2.5mA typ
24pin QFN (0.5mm pitch, 4mm4mm0.7mm)
-40 to +85°C
MS1478-E-01
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2013/2
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AK1590 Datasheet, Funktion
[AK1590]
Parameter
Supply Voltage
Ground Level
Analog Input Voltage
Digital Input Voltage
Input Current
Storage Temperature
5. Absolute Maximum Ratings
Symbol
VDD1
VDD2
VSS1
VSS2
VSS3
VAIN1
VAIN2
VDIN
IIN
Tstg
Table 2 Absolute Maximum Ratings
Min.
Max.
Unit
Remarks
-0.3 6.5 V Note 1, Note 2
-0.3 6.5 V Note 1, Note 3
0 0 V Voltage ground level, Note 4
0 0 V Voltage ground level, Note 5
0 0 V Voltage ground level, Note 6
VSS1-0.3 VDD1+0.3 V Note 1, Note 7, Note 10
VSS2-0.3 VDD2+0.3 V Note 1, Note 8, Note 10
VSS3-0.3 VDD1+0.3 V Note 1, Note 9, Note 10
-10 10 mA
-55 125 °C
Note 1) 0V reference for all voltages.
Note 2) Applied to [PVDD] pin.
Note 3) Applied to [CPVDD] pin
Note 4) Applied to [PVSS] pin.
Note 5) Applied to [CPVSS] pin.
Note 6) Applied to [DVSS] pin.
Note 7) Applied to [REFIN], [RFINN] and [RFINP] pins.
Note 8) Applied to [CPZ] and [SWIN] pins.
Note 9) Applied to [CLK], [DATA], [LE], [PDN1] and [PDN2] pins.
Note 10) Maximum must not be over 6.5V.
Exceeding these maximum ratings may result in damage to AK1590. Normal operation is not guaranteed at these
extremes.
6. Recommended Operating Range
Parameter
Operating Temperature
Supply Voltage
Table 3 Recommended Operating Range
Symbol Min. Typ. Max. Unit
Remarks
Ta -40
85 C
VDD1
2.7
3.3
5.5
V Applied to [PVDD] pin
VDD2 VDD1 5.0
5.5
V Applied to [CPVDD] pin
VDD1 and VDD2 can be driven individually within the recommended operating range.
The specifications are applicable within the recommended operating range (supply voltage / operating temperature).
MS1478-E-01
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AK1590 pdf, datenblatt
[AK1590]
2. Frequency Offset Adjustment
AK1590 has an offset adjustable register which can tune the carrier frequency set by {NUM[17:0]} in <Address1>
and {INT[14:0]} in <Address2>. When the offset register: {OFST[17:0]} in <Address6> is accessed, {NUM[17:0]} and
{INT[14:0]} are internally recalculated automatically and their recalculated data are used in delta-sigma and N-divider. This
operation is suitable for AFC and DFM applications.
When frequency offset is not used, the offset register must be written 00000 (hexadecimal).
Setting examples
Example 1) The frequency offset is positive; when the frequency offset is 100Hz and FPFD is 1MHz.
Frequency offset = 100Hz / (1MHz/218) = 26.2
It is round off to 26 (decimal) = 1A (hexadecimal) = 11010 (binary)
Example 2) The frequency offset is negative; when the frequency offset is -100Hz and FPFD is 1MHz.
Frequency offset = -100Hz / (1MHz/218) = -26.2
It is round off to -26 (decimal), which is reduced from 218 to be converted into binary for 2’s
complementary expression.
218 26 = 262118 (decimal) = 3FFE6 (hexadecimal) = 11 1111 1111 1110 0110 (binary)
Algorithm of recalculation
Sum = NUM + OFST
Sum 0.5
No
Yes
NUM_recal = (NUM + OFST) -1
INT_recal = INT +1
Sum < -0.5
Yes
NUM_recal = (NUM + OFST) +1
INT_recal = INT -1
No
NUM_recal = NUM + OFST
INT_recal = INT
INT
NUM
OFST
INT_recal
NUM_recal
written data in integer register {INT[14:0]}
written data in numerator register {NUM[17:0]}
written data in offset register {OFST[17:0]}
recalculated integer data
recalculated numerator data
MS1478-E-01
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12 Page





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