PDF ILI6480G Data sheet ( Hoja de datos )

Número de pieza	ILI6480G
Descripción	Single Chip for 480RGBx272 TFT Panel 720x544 Driver
Fabricantes	ILI TECHNOLOGY
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No Preview Available ! ILI6480G Single Chip for 480RGBx272 TFT Panel 720x544 Driver with Timing Controller Datasheet Preliminary Version: V0.04 Document No.: ILI6480B_DS_V0.04.pdf ILI TECHNOLOGY CORP. 8F, No.38, Taiyuan St., Jhubei City, Hsinchu County 302, Taiwan, R.O.C Tel.886-3-5600099; Fax.886-3-5600055 http://www.Datasheet4U.com 1 page Single Chip for 480RGBx272 TFT Panel 720X544 DRIVER WITH TIMING CONTROLLER 4. Application Block ILI6480G GND DR[7:0] DG[7:0] DB[7:0] DCLK VSD HSD DEN CSB SCL SDA STB VDD GND AGND PVDD PGND VDDIO Schottky Diode Turn on voltage<0.3V 2.2uF/16V 1uF/16V 2.2uF/25V 1uF/16V 2.2uF/16V 1uF/16V PVDD 4.7uF/6V 2.2uF/6V 2.2uF/6V 2.2uF/6V 4.7uF/10V 2.2uF/6V 4.7uF/10V 4.7uF/10V Optional: RC delay for reset 2.2uF/6V VDD 2.2uF/6V VDDIO 2.2uF/6V 4.7uF/10V 4.7uF/10V DUM SHIELDING10 VGL C4M C4P VGH C3M C3P SHIELDING9 VINT2 C2M C2P PVDD C1CM C1CP C1BM C1BP C1AM C1AP COM2_L PGND VINT1 C5P C5M VINT3 SHIELDING8 AGND AVDD SHIELDING7 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DG7 DG6 DG5 DG4 DG3 DG2 DG1 DG0 DR7 DR6 DR5 DR4 DR3 DR2 DR1 DR0 SHIELDING6 CPSEL PINCTL SHLR UPDN HVDSL GRB STB SCL/CABC_Mode1 SDA/CABC_Mode0 CSB/RESERVED PSEL DEN DCLK HSD VSD VDD VDDIO VCC GND DRV SHIELDING5 FB SHIELDING4 DUM VCOM VCOML VCOMH SHIELDING3 COM1_L SHIELDING2 VPP OTP TCSW1 TCSW0 TB1 TB0(PWM_OUT) CLKPOL HSDPOL VSDPOL DITHB FPOL SHDB EXT_PWR LHL TB3 TB2 TM3 TM2 RBSWP DSWP TP10 TP9 TP8 TP7 TP6 TP5 TP4 TP3 TP2 TP1 TP0 SHIELDING1 DUM (1) (1) (3) (2) (2) (3) (2) (2) (1) (3) (2) (2) (8) (3) (3) (3) (3) (3) (3) (2) (8) (6) (3) (3) (4) (1) (6) (6) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (3) (3) (3) (3) (2) (1) (1) (1) (3) (6) (3) (3) (1) (2) (1) (3) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) DUM G2 G4 G6 (1) (1) (1) (1) G540 G542 G544 COM2_R COM2_R COM2_R COM2_R COM2_R S1 S2 S3 (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) S1 S2 S3 S358 S359 S360 DCMP DCMP DCMP DCMP DCMP DCMP DCMP DCMP S361 S362 S363 (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) S718 S719 S720 COM1_R COM1_R COM1_R COM1_R COM1_R G543 G541 G539 (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) S718 S719 S720 G5 G3 G1 DUM (1) (1) (1) (1) Page 5 of 60 http://www.Datasheet4U.com 5 Page Single Chip for 480RGBx272 TFT Panel ILI6480G720X544 DRIVER WITH TIMING CONTROLLER 7. 3-wire Serial Interface ILI6480B uses the 3-wire serial interface to set all the function and register parameter. The 3-wire serial interface is bi-directional and controlled by the R/W bit. In the read mode, 3-wire serial interface will return the read data during “Data phase”. The returned data should be latched at the rising edge of SCL by external controller. Data in the “Hi-Z phase” will be ignored. During read operation, external controller should float SDA pin under the “Hi-Z phase” and “Data phase”. Each Read/Write operation should be exactly 16 bit to prevent from incorrect setting of the internal register; any write operation with more or less than 16 bit data during a CSB Low period will be ignored by 3-wire serial interface. CSB Address[5:0] W/R Hi-Z Data[7:0] Delay Next Transfer SDA D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 SCL Bit Description D[15:10] Register Address [5:0]. D9 W/R control bit. “0” for Write; “1” for Read D8 Hi-Z bit during read mode. Any data within this bits will be ignored during write mode D[7:0] Data for the W/R operation to the address indicated by Address phase Note: Setting of all the registers will take effect at the coming falling edge of VSD signal except RESETB and STBYB bit. Page 11 of 60 http://www.Datasheet4U.com 11 Page

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