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MAX1241 Schematic ( PDF Datasheet ) - Maxim Integrated

Teilenummer MAX1241
Beschreibung 12-Bit Serial ADCs
Hersteller Maxim Integrated
Logo Maxim Integrated Logo 




Gesamt 15 Seiten
MAX1241 Datasheet, Funktion
19-1155; Rev 5; 8/10
EVAALVUAAILTAIOBNLEKIT
+2.7V, Low-Power,
12-Bit Serial ADCs in 8-Pin SO
__________________General Description
The MAX1240/MAX1241 low-power, 12-bit analog-to-
digital converters (ADCs) are available in 8-pin pack-
ages. The MAX1240 operates with a single +2.7V to
+3.6V supply, and the MAX1241 operates with a single
+2.7V to +5.25V supply. Both devices feature a 7.5µs
successive-approximation ADC, a fast track/hold
(1.5µs), an on-chip clock, and a high-speed, 3-wire ser-
ial interface.
Power consumption is only 37mW (VDD = 3V) at the
73ksps maximum sampling speed. A 2µA shutdown
mode reduces power at slower throughput rates.
The MAX1240 has an internal 2.5V reference, while the
MAX1241 requires an external reference. The MAX1241
accepts signals from 0V to VREF, and the reference
input range includes the positive supply rail. An exter-
nal clock accesses data from the 3-wire interface,
which connects directly to standard microcontroller I/O
ports. The interface is compatible with SPI™, QSPI™,
and MICROWIRE™.
Excellent AC characteristics and very low power com-
bined with ease of use and small package size make
these converters ideal for remote-sensor and data-
acquisition applications, or for other circuits with
demanding power consumption and space require-
ments. The MAX1240/MAX1241 are available in 8-pin
PDIP and SO packages.
Battery-Powered Systems
Portable Data Logging
Isolated Data Acquisition
Process Control
Instrumentation
Applications
Pin Configuration
________________________________Features
Single-Supply Operation:
+2.7V to +3.6V (MAX1240)
+2.7V to +5.25V (MAX1241)
12-Bit Resolution
Internal 2.5V Reference (MAX1240)
Small Footprint: 8-Pin PDIP/SO Packages
Low Power: 3.7µW (73ksps, MAX1240)
3mW (73ksps, MAX1241)
66µW (1ksps, MAX1241)
5µW (power-down mode)
Internal Track/Hold
SPI/QSPI/MICROWIRE 3-Wire Serial Interface
Internal Clock
Ordering Information
PART*
TEMP RANGE
PIN-
PACKAGE
INL
(LSB)
MAX1240ACPA+
0°C to +70°C 8 PDIP
±1/2
MAX1240BCPA+
0°C to +70°C 8 PDIP
±1
MAX1240CCPA+
0°C to +70°C 8 PDIP
±1
MAX1240ACSA+
0°C to +70°C 8 SO
±1/2
MAX1240BCSA+
MAX1240CCSA+
0°C to +70°C 8 SO
0°C to +70°C 8 SO
±1
±1
MAX1240CC/D
0°C to +70°C Dice*
±1
MAX1240AESA/V+** -40°C to +85°C 8 SO
±1/2
MAX1240BESA/V+ -40°C to +85°C 8 SO
Ordering Information continued at end of data sheet.
*Dice are specified at TA = +25°C, DC parameters only.
**Future product—contact factory for availability.
/V denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
±1
Functional Diagram
CS
SCLK
7
8
VDD
1
TOP VIEW
SHDN 3
CONTROL
LOGIC
INT
CLOCK
VDD 1
8 SCLK
AIN 2
SHDN 3
REF 4
MAX1240
MAX1241
7 CS
6 DOUT
5 GND
PDIP/SO
AIN 2
T/H
4
REF
2.5V REFERENCE
(MAX1240 ONLY)
12-BIT
SAR
5
GND
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
OUTPUT
SHIFT
REGISTER
MAX1240
MAX1241
6
DOUT
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.






MAX1241 Datasheet, Funktion
+2.7V, Low-Power,
12-Bit Serial ADCs in 8-Pin SO
____________________________Typical Operating Characteristics (continued)
(VDD = 3.0V, VREF = 2.5V, fSCLK = 2.1MHz, CL = 20pF, TA = +25°C, unless otherwise noted.)
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2.25
2.75 3.25 3.75 4.25 4.75
SUPPLY VOLTAGE (V)
5.25
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
-60
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
-20 20 60 100
TEMPERATURE (°C)
140
OFFSET ERROR vs. TEMPERATURE
0.8
VDD = 2.7V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-55 -30 -5 20 45 70 95 120 145
TEMPERATURE (°C)
GAIN ERROR
vs. SUPPLY VOLTAGE
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
2.25 2.75 3.25 3.75 4.25 4.75 5.25
SUPPLY VOLTAGE (V)
MAX1240
INTERNAL REFERENCE VOLTAGE
vs. TEMPERATURE
2.501
2.500
2.499
2.498
VDD = 3.6V
VDD = 2.7V
2.497
2.496
2.495
2.494
-60
-20 20 60 100
TEMPERATURE (°C)
140
GAIN ERROR
vs. TEMPERATURE
0.8
VDD = 2.7V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-55 -30 -5 20 45 70 95 120 145
TEMPERATURE (°C)
2.5020
MAX1240
INTERNAL REFERENCE VOLTAGE
vs. SUPPLY VOLTAGE
2.5015
2.5010
2.5005
2.5000
2.4995
2.4990
2.25 2.75 3.25 3.75 4.25 4.75 5.25
VDD (V)
INTEGRAL NONLINEARITY
vs. SUPPLY VOLTAGE
1.2
1.0
0.8
0.6
0.4 MAX1240
0.2
MAX1241
0
2.25
2.75 3.25 3.75 4.25 4.75
SUPPLY VOLTAGE (V)
5.25
INTEGRAL NONLINEARITY
vs. TEMPERATURE
1.2
VDD = 2.7V
1.0
0.8
0.6
0.4
MAX1240
0.2
MAX1241
0
-60 -40 -20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
6 _______________________________________________________________________________________

6 Page









MAX1241 pdf, datenblatt
+2.7V, Low-Power,
12-Bit Serial ADCs in 8-Pin SO
5) With CS = high, wait the minimum specified time, tCS,
before initiating a new conversion by pulling CS low.
If a conversion is aborted by pulling CS high before
the conversion’s end, wait for the minimum acquisi-
tion time, tACQ, before starting a new conversion.
CS must be held low until all data bits are clocked out.
Data can be output in two bytes or continuously, as
shown in Figure 8. The bytes contain the result of the
conversion padded with one leading 1, and trailing 0s.
SPI and MICROWIRE
When using SPI or MICROWIRE, set CPOL = 0 and
CPHA = 0. Conversion begins with a CS falling edge.
DOUT goes low, indicating a conversion in progress. Wait
until DOUT goes high or until the maximum specified
7.5µs conversion time elapses. Two consecutive 1-byte
reads are required to get the full 12 bits from the ADC.
DOUT output data transitions on SCLK’s falling edge and
is clocked into the µP on SCLK’s rising edge.
The first byte contains a leading 1, and seven bits of con-
version result. The second byte contains the remaining
five bits and three trailing zeros. See Figure 11 for con-
nections and Figure 12 for timing.
QSPI
Set CPOL = CPHA = 0. Unlike SPI, which requires two
1-byte reads to acquire the 12 bits of data from the ADC,
QSPI allows the minimum number of clock cycles neces-
sary to clock in the data. The MAX1240/MAX1241
requires 13 clock cycles from the µP to clock out the 12
bits of data with no trailing zeros (Figure 13). The maxi-
mum clock frequency to ensure compatibility with QSPI is
2.097MHz.
Layout, Grounding, and Bypassing
For best performance, use printed circuit boards. Wire-
wrap boards are not recommended. Board layout should
ensure that digital and analog signal lines are separated
from each other. Do not run analog and digital (especially
clock) lines parallel to one another, or digital lines under-
neath the ADC package.
Figure 14 shows the recommended system ground con-
nections. Establish a single-point analog ground (“star”
ground point) at GND, separate from the logic ground.
Connect all other analog grounds and DGND to this star
ground point for further noise reduction. No other digital
I/O
SCK
MISO
+3V
a) SPI
SS
CS
SCK
MISO
+3V
b) QSPI
SS
I/O
SK
SI
c) MICROWIRE
CS
SCLK
DOUT
MAX1240
MAX1241
CS
SCLK
DOUT
MAX1240
MAX1241
CS
SCLK
DOUT
MAX1240
MAX1241
Figure 11. Common Serial-Interface Connections to the
MAX1241
system ground should be connected to this single-point
analog ground. The ground return to the power supply for
this ground should be low impedance and as short as
possible for noise-free operation.
High-frequency noise in the VDD power supply may affect
the ADC’s high-speed comparator. Bypass this supply to
the single-point analog ground with 0.1µF and 4.7µF
bypass capacitors. Minimize capacitor lead lengths for
best supply-noise rejection. If the power supply is very
noisy, a 10Ω resistor can be connected as a lowpass filter
to attenuate supply noise (Figure 14).
12 ______________________________________________________________________________________

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