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MX25V4006E Schematic ( PDF Datasheet ) - MACRONIX

Teilenummer MX25V4006E
Beschreibung 4M-BIT [x 1/x 2] CMOS SERIAL FLASH
Hersteller MACRONIX
Logo MACRONIX Logo 




Gesamt 30 Seiten
MX25V4006E Datasheet, Funktion
MX25V4006E
MX25V4006E
DATASHEET
P/N: PM1638
REV. 1.4, NOV. 14, 2013
1
http://www.Datasheet4U.com






MX25V4006E Datasheet, Funktion
BLOCK DIAGRAM
Address
Generator
MX25V4006E
Memory Array
SI
CS#
SCLK
Page Buffer
Data
Register
SRAM
Buffer
Mode
Logic
State
Machine
Y-Decoder
HV
Generator
Sense
Amplifier
Clock Generator
Output
Buffer
SO
P/N: PM1638
REV. 1.4, NOV. 14, 2013
6
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6 Page









MX25V4006E pdf, datenblatt
MX25V4006E
COMMAND DESCRIPTION
(1) Write Enable (WREN)
The Write Enable (WREN) instruction is for setting Write Enable Latch (WEL) bit. For those instructions like PP, SE,
BE, CE, and WRSR, which are intended to change the device content, should be set every time after the WREN in-
struction setting the WEL bit.
The sequence is shown as Figure 11.
(2) Write Disable (WRDI)
The Write Disable (WRDI) instruction is for resetting Write Enable Latch (WEL) bit.
The sequence is shown as Figure 12.
The WEL bit is reset by following situations:
- Power-up
- Write Disable (WRDI) instruction completion
- Write Status Register (WRSR) instruction completion
- Page Program (PP) instruction completion
- Sector Erase (SE) instruction completion
- Block Erase (BE) instruction completion
- Chip Erase (CE) instruction completion
P/N: PM1638
12
REV. 1.4, NOV. 14, 2013
http://www.Datasheet4U.com

12 Page





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