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PDF AD7091R Data sheet ( Hoja de datos )
| Número de pieza | AD7091R | |
| Descripción | 12-Bit ADC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
1 MSPS, Ultralow Power,
12-Bit ADC in 10-Lead LFCSP and MSOP
AD7091R
FEATURES
Fast throughput rate of 1 MSPS
Specified for VDD of 2.7 V to 5.25 V
Logic voltage VDRIVE of 1.65 V to 5.25 V
INL of ±1 LSB maximum
Analog input range of 0 V to VREF
Ultralow power
349 µA typical at 3 V and 1 MSPS
264 nA typical at 3 V in power-down mode
Internal 2.5 V reference, ±4.5 ppm/°C typical drift
Wide input bandwidth
Flexible power/throughput rate management
High speed serial interface
SPI®/QSPI™/MICROWIRE™/DSP compatible
BUSY indicator
Power-down mode
10-lead, 3 mm × 2 mm LFCSP and 10-lead MSOP packages
Temperature range of −40°C to +125°C
APPLICATIONS
Battery-powered systems
Handheld meters
Medical instruments
Mobile communications
Instrumentation and control systems
Data acquisition systems
Optical sensors
Diagnostic/monitoring functions
Energy harvesting
GENERAL DESCRIPTION
The AD7091R is a 12-bit successive approximation analog-to-
digital converter (ADC) that offers ultralow power consumption
(typically 349 µA at 3 V and 1 MSPS) while achieving fast
throughput rates (1 MSPS with a 50 MHz SCLK). Operating
from a single 2.7 V to 5.25 V power supply, the part contains a
wide bandwidth track-and-hold amplifier that can handle input
frequencies in excess of 7 MHz. The AD7091R also features an
on-chip conversion clock, accurate reference, and high speed
serial interface.
The conversion process and data acquisition are controlled using
a CONVST signal and an internal oscillator. The AD7091R has
a serial interface that allows data to be read after the conversion
while achieving a 1 MSPS throughput rate.
FUNCTIONAL BLOCK DIAGRAM
REGCAP REFIN/REFOUT
VDD
2.5V AD7091R
REF
VIN T/H
12-BIT
SAR
SERIAL
INTERFACE
CONVERSION
CONTROL LOGIC
CLK
OSC
SDO
SCLK
CS
VDRIVE
CONVST
GND
Figure 1.
1100
1000
VVDDDD == VVDDRRIVIVEE ==33VV
900
800
700
600
500
VDD
400
300
200
100
0
0
VDRIVE
200 400 600 800
THROUGHPUT RATE (kSPS)
1000
Figure 2. Power vs. Throughput Rate
The AD7091R uses advanced design and process techniques to
achieve very low power dissipation at high throughput rates. An
on-chip, accurate 2.5 V reference is available.
PRODUCT HIGHLIGHTS
1. Lowest Power 12-Bit SAR ADC Available.
2. On-Chip, Accurate 2.5 V Reference.
3. High Throughput Rate with Ultralow Power Consumption.
4. Flexible Power/Throughput Rate Management.
Average power scales with the throughput rate. Power-down
mode allows the average power consumption to be reduced
when the device is not performing a conversion.
5. Single Supply Operation with VDRIVE Function.
The AD7091R operates from a single 2.7 V to 5.25 V supply.
The VDRIVE function allows the serial interface to connect
directly to 1.8 V to 3.3 V processors.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.
Free Datasheet http://www.nDatasheet.com
1 page  
AD7091R
Data Sheet
Parameter
POWER REQUIREMENTS
VDD
VDRIVE
IDD
Normal Mode—Static5
Normal Mode—Operational
Power-Down Mode
IDRIVE
Normal Mode—Static6
Normal Mode—Operational
Power-Down Mode
Test Conditions/Comments
VIN = 0 V
VDD = 5.25 V
VDD = 3 V
VDD = 5.25 V, fSAMPLE = 1 MSPS
VDD = 3 V, fSAMPLE = 1 MSPS
VDD = 3 V, fSAMPLE = 100 kSPS
VDD = 5.25 V
VDD = 5.25 V, TA = −40°C to +85°C
VDD = 3 V
VDD = 3 V, TA = −40°C to +85°C
VIN = 0 V
VDRIVE = 5.25 V
VDRIVE = 3 V
VDRIVE = 5.25 V, fSAMPLE = 1 MSPS
VDRIVE = 3 V, fSAMPLE = 1 MSPS
VDRIVE = 5.25 V
VDRIVE = 3 V
Min Typ Max Unit
2.7 5.25 V
1.65 5.25 V
22
21.6
388
349
55
0.334
0.334
0.264
0.264
60
33
449
408
4.4
1.4
4.2
1.2
µA
µA
µA
µA
µA
µA
µA
µA
µA
32 500
28 500
42 86
17 20
7 41
2 28
nA
nA
µA
µA
nA
nA
Total Power Dissipation (PDD + PDRIVE)
Normal Mode—Static5
Normal Mode—Operational
Power-Down Mode
VIN = 0 V
VDD = VDRIVE = 5.25 V
VDD = VDRIVE = 3 V
VDD = VDRIVE = 5.25 V, fSAMPLE = 1 MSPS
VDD = VDRIVE = 3 V, fSAMPLE = 1 MSPS
VDD = VDRIVE = 5.25 V
VDD = VDRIVE = 3 V
116 318
65 101
2.3 2.9
1 1.3
1.8 24
0.8 13
µW
µW
mW
mW
µW
µW
1 Dynamic performance is achieved with a burst SCLK. Operating a free running SCLK during acquisition phase degrades dynamic performance.
2 See the Terminology section.
3 For VDRIVE < VDD + 0.7 V.
4 Sample tested during initial release to ensure compliance.
5 SCLK is operating in burst mode and CS is idling high. With a free running SCLK and CS pulled low, the IDD static current is increased by 30 µA typical at VDD = 5.25 V.
6 SCLK is operating in burst mode and CS is idling high. With a free running SCLK and CS pulled low, the IDRIVE static current is increased by 32 µA typical at VDRIVE = 5.25 V.
Rev. 0 | Page 4 of 20
Free Datasheet http://www.nDatasheet.com
5 Page 
AD7091R
4000
3500
3000
VDD = 3V, VDRIVE = 3V
VDD = 5V, VDRIVE = 5V
VDD = 5V, VDRIVE = 3.3V
2500
2000
1500
1000
500
0
–40 25
85 125
OPERATING TEMPERATURE (°C)
Figure 17. Total Power-Down Supply Current (IDD and IDRIVE) vs. Temperature
for Various Supply Voltages
Data Sheet
Rev. 0 | Page 10 of 20
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11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet AD7091R.PDF ] | |
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