|
|
PDF 89E516RD2 Data sheet ( Hoja de datos )
| Número de pieza | 89E516RD2 | |
| Descripción | SST89E516RD2 | |
| Fabricantes | Silicon Storage Technology | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de 89E516RD2 (archivo pdf) en la parte inferior de esta página. Total 70 Páginas | ||
|
No Preview Available !
FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
FEATURES:
SST89E/V516 / 58 / 54 / 52RD2 FlashFlex51 MCU
Preliminary Specifications
• 8-bit 8051-Compatible Microcontroller (MCU)
with Embedded SuperFlash Memory
– Fully Software Compatible
– Development Toolset Compatible
– Pin-For-Pin Package Compatible
• SST89E5xxRD2 Operation
– 0 to 40 MHz at 5V
• SST89V5xxRD2 Operation
– 0 to 33 MHz at 3V
• 1 KByte Internal RAM
• Dual Block SuperFlash EEPROM
– 8/16/32/64 KByte primary block +
8 KByte secondary block
(128-Byte sector size for both blocks)
– Individual Block Security Lock with SoftLock
– Concurrent Operation during
In-Application Programming (IAP)
– Memory Overlay for Interrupt Support during IAP
• Support External Address Range up to 64
KByte of Program and Data Memory
• Three High-Current Drive Ports (16 mA each)
• Three 16-bit Timers/Counters
• Full-Duplex, Enhanced UART
– Framing Error Detection
– Automatic Address Recognition
• Ten Interrupt Sources at 4 Priority Levels
– Four External Interrupt Inputs
• Programmable Watchdog Timer (WDT)
• Programmable Counter Array (PCA)
• Four 8-bit I/O Ports (32 I/O Pins) and
One 4-bit Port
• Second DPTR register
• Low EMI Mode (Inhibit ALE)
• SPI Serial Interface
• Standard 12 Clocks per cycle, the device has an
option to double the speed to 6 clocks per cycle.
• TTL- and CMOS-Compatible Logic Levels
• Brown-out Detection
• Low Power Modes
– Power-down Mode with External Interrupt Wake-up
– Idle Mode
• Temperature Ranges:
– Commercial (0°C to +70°C)
– Industrial (-40°C to +85°C)
• Packages Available
– 44-lead PLCC
– 40-pin PDIP (Port 4 feature not available)
– 44-lead TQFP
PRODUCT DESCRIPTION
The SST89E5xxRD2 and SST89V5xxRD2 are members
of the FlashFlex51 family of 8-bit microcontroller products
designed and manufactured with SST’s patented and pro-
prietary SuperFlash CMOS semiconductor process tech-
nology. The split-gate cell design and thick-oxide tunneling
injector offer significant cost and reliability benefits for SST’s
customers. The devices use the 8051 instruction set and
are pin-for-pin compatible with standard 8051 microcontrol-
ler devices.
The devices come with 16/24/40/72 KByte of on-chip flash
EEPROM program memory which is partitioned into 2
independent program memory blocks. The primary Block 0
occupies 8/16/32/64 KByte of internal program memory
space and the secondary Block 1 occupies 8 KByte of
internal program memory space.
The 8-KByte secondary block can be mapped to the lowest
location of the 8/16/32/64 KByte address space; it can also
be hidden from the program counter and used as an inde-
pendent EEPROM-like data memory.
In addition to the 16/24/40/72 KByte of EEPROM program
memory on-chip, the devices can address up to 64 KByte
of external program memory. In addition to 1024 x8 bits of
on-chip RAM, up to 64 KByte of external RAM can be
addressed.
The flash memory blocks can be programmed via a stan-
dard 87C5x OTP EPROM programmer fitted with a special
adapter and the firmware for SST’s devices. During power-
on reset, the devices can be configured as either a slave to
an external host for source code storage or a master to an
external host for an in-application programming (IAP) oper-
ation. The devices are designed to be programmed in-sys-
tem and in-application on the printed circuit board for
maximum flexibility. The devices are pre-programmed with
an example of the bootstrap loader in the memory, demon-
strating the initial user program code loading or subsequent
user code updating via the IAP operation. The sample
bootstrap loader is available for the user’s reference and
convenience only; SST does not guarantee its functionality
or usefulness. Chip-Erase or Block-Erase operations will
erase the pre-programmed sample code.
©2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
1
The SST logo, SuperFlash, and FlashFlex are registered trademarks of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.
Free Datasheet http://www.datasheetlist.com/
1 page  
FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
Preliminary Specifications
FIGURE 14-15: Select-Block1 / Select-Block0 (For SST89E/V516RD2 only) . . . . . . . . . . . . . . . . . . . . . . . 82
FIGURE 14-16: Chip-Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
FIGURE 14-17: Block-Erase for SST89E/V516RD2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
FIGURE 14-18: Block-Erase for SST89E/V5xRD2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
FIGURE 14-19: Sector-Erase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
FIGURE 14-20: Byte-Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
FIGURE 14-21: Prog-SB1 / Prog-SB2 / Prog-SB3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
FIGURE 14-22: Prog-SC0 / Prog-SC1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
FIGURE 14-23: Byte-Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
LIST OF TABLES
TABLE 2-1: Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
TABLE 3-1: SFCF Values for Program Memory Block Switching for SST89E/V516RD2 . . . . . . . . . . . . . 13
TABLE 3-2: SFCF Values for Program Memory Block Switching for SST89E/V5xRD2 . . . . . . . . . . . . . . 13
TABLE 3-3: SFCF Values Under Different Reset Conditions (SST89E/V5xRD2) . . . . . . . . . . . . . . . . . . . 14
TABLE 3-4: SFCF Values Under Different Reset Conditions (SST89E/V516RD2) . . . . . . . . . . . . . . . . . . 14
TABLE 3-5: External Data Memory RD#, WR# with EXTRAM bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
TABLE 3-6: FlashFlex51 SFR Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
TABLE 3-7: CPU related SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
TABLE 3-8: Flash Memory Programming SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
TABLE 3-9: Watchdog Timer SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
TABLE 3-10: Timer/Counters SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
TABLE 3-11: Interface SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TABLE 3-12: PCA SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
TABLE 4-1: External Host Mode Commands for SST89E/V5xRD2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
TABLE 4-2: External Host Mode Commands for SST89E/V516RD2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
TABLE 4-3: Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
TABLE 4-4: Additional Read Commands in External Host Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TABLE 4-5: IAP Address Resolution for SST89E/V516RD2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TABLE 4-6: IAP Commands for SST89E/V516RD2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
TABLE 4-7: IAP Commands for SST89E/V5xRD2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
TABLE 5-1: Timer/Counter 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
TABLE 5-2: Timer/Counter 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
TABLE 5-3: Timer/Counter 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
TABLE 8-1: PCA Timer/Counter Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
TABLE 8-2: PCA Timer/Counter Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
TABLE 8-3: CMOD Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
TABLE 8-4: PCA High and Low Register Compare/Capture Modules. . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
TABLE 8-5: PCA Module Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
TABLE 8-6: PCA Module Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
TABLE 8-7: Pulse Width Modulator Frequencies. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
©2004 Silicon Storage Technology, Inc.
5
S71255-00-000
3/04
Free Datasheet http://www.datasheetlist.com/
5 Page 
FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
3.0 MEMORY ORGANIZATION
Preliminary Specifications
The device has separate address spaces for program and
data memory.
3.1 Program Flash Memory
There are two internal flash memory blocks in the device.
The primary flash memory block (Block 0) has 8/16/32/64
KByte. The secondary flash memory block (Block 1) has 8
KByte. Since the total program address space is limited to
64 KByte, the SFCF[1:0] bit are used to control program
bank selection. Please refer to Figures 3-1 through 3-4 for
the program memory configuration. Program bank selec-
tion is described in the next section.
The 8K/16K/32K/64K x8 primary SuperFlash block is orga-
nized as 64/128/256/512 sectors, each sector consists of
128 Bytes.
The 8K x8 secondary SuperFlash block is organized as 64
sectors, each sector consists also of 128 Bytes.
For both blocks, the 7 least significant program address bits
select the byte within the sector. The remainder of the pro-
gram address bits select the sector within the block.
FFFFH
EA# = 0
EA# = 1
SFCF[1:0] = 00
FFFFH
E000H
DFFFH
8 KByte
Block 1
EA# = 1
SFCF[1:0] = 01
FFFFH
E000H
DFFFH
8 KByte
Block 1
EA# = 1
SFCF[1:0] = 10, 11
FFFFH
External
64 KByte
Not
Accessible
Not
Accessible
Not
Accessible
0000H
2000H
1FFFH
0000H
8 KByte
Block 1
8000H
7FFFH
0000H
8 KByte
Block 0
8000H
7FFFH
0000H
FIGURE 3-1: PROGRAM MEMORY ORGANIZATION FOR 8 KBYTE SST89E/V52RD2
8 KByte
Block 0
1255 F01.0
©2004 Silicon Storage Technology, Inc.
11
S71255-00-000
3/04
Free Datasheet http://www.datasheetlist.com/
11 Page | ||
| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet 89E516RD2.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| 89E516RD2 | SST89E516RD2 | Silicon Storage Technology |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |