PDF HEF4511B Data sheet ( Hoja de datos )

Número de pieza	HEF4511B
Descripción	BCD to 7-segment latch/decoder/driver
Fabricantes	NXP Semiconductors
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No Preview Available ! HEF4511B BCD to 7-segment latch/decoder/driver Rev. 7 — 11 November 2011 Product data sheet 1. General description The HEF4511B is a BCD to 7-segment latch/decoder/driver with four address inputs (D0 to D3), an active HIGH latch enable input (LE), an active LOW ripple blanking input (BL), an active LOW lamp test input (LT), and seven active HIGH NPN bipolar transistor segment outputs (Qa to Qg). When LE is LOW and BL is HIGH, the state of the segment outputs (Qa to Qg) is determined by the data on D0 to D3. When LE goes HIGH, the last data present on D0 to D3 is stored in the latches and the segment outputs remain unchanged. When LT is LOW, all of the segment outputs are HIGH independent of all other input conditions. With LT HIGH, a LOW on BL forces all segment outputs LOW. The inputs LT and BL do not affect the latch circuit. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. 2. Features and benefits  Fully static operation  5 V, 10 V, and 15 V parametric ratings  Standardized symmetrical output characteristics  Specified from 40 C to +85 C and 40 C to +125 C  Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to +125 C. Type number Package Name Description HEF4511BP DIP16 plastic dual in-line package; 16 leads (300 mil) HEF4511BT SO16 plastic small outline package; 16 leads; body width 3.9 mm Version SOT38-4 SOT109-1 1 page NXP Semiconductors HEF4511B BCD to 7-segment latch/decoder/driver 6. Functional description Table 3. Function table[1] Inputs Outputs Display LE BL LT D3 D2 D1 D0 Qa Qb Qc Qd Qe Qf Qg XXL XXXXHHHHHHH8 X L H X X X X L L L L L L L blank L HHL L L L HHHHHHL 0 L HHL L L HL HHL L L L 1 L HHL L HL HHL HHL H2 L HHL L HHHHHHL L H3 L HHL HL L L HHL L HH4 L HHL HL HHL HHL HH5 L HHL HHL L L HHHHH6 L HHL HHHHHHL L L L 7 L HHHL L L HHHHHHH8 L HHHL L HHHHL L HH9 L H H H L H X L L L L L L L blank L H H H H X X L L L L L L L blank H H H X X X X N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; N.C. = no change. Fig 5. Seven segment digital display with segment designation a fg b ec d 001aaj494 HEF4511B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 November 2011 © NXP B.V. 2011. All rights reserved. 5 of 20 5 Page NXP Semiconductors HEF4511B BCD to 7-segment latch/decoder/driver VI LE input VM VSS tW VI D2 input VM VSS VOH tsu th Qg output VOL 001aae682 Fig 7. The shaded area indicates where the input is permitted to change for predictable output performance. Conditions: D3 = LOW and D0 = D1 = BL = LT = HIGH. Measurement points are given in Table 10. Waveforms showing minimum LE pulse width, set-up, and hold time for Dn to LE HEF4511B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 November 2011 © NXP B.V. 2011. All rights reserved. 11 of 20 11 Page

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