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PDF HEF4027B Data sheet ( Hoja de datos )

Número de pieza HEF4027B
Descripción Dual JK flip-flop
Fabricantes NXP Semiconductors　
Logotipo NXP Semiconductors Logotipo



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HEF4027B
Dual JK flip-flop
Rev. 9 — 18 November 2011
Product data sheet
1. General description
The HEF4027B is a edge-triggered dual JK flip-flop which features independent set-direct
(SD), clear-direct (CD), clock (CP) inputs and outputs (Q, Q). Data is accepted when CP is
LOW, and transferred to the output on the positive-going edge of the clock. The active
HIGH asynchronous clear-direct (CD) and set-direct (SD) inputs are independent and
override the J, K, and CP inputs. The outputs are buffered for best system performance.
Schmitt trigger action makes the clock input highly tolerant of slower rise and fall times.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C
Complies with JEDEC standard JESD 13-B
3. Applications
Registers
Counters
Control circuits
4. Ordering information
Table 1. Ordering information
Tamb from 40 C to +85 C.
Type number Package
Name
Description
HEF4027BP DIP16
plastic dual in-line package; 16 leads (300 mil)
HEF4027BT SO16
plastic small outline package; 16 leads; body width 3.9 mm
Version
SOT38-4
SOT109-1

1 page




HEF4027B pdf
NXP Semiconductors
HEF4027B
Dual JK flip-flop
10. Static characteristics
Table 6. Static characteristics
VSS = 0 V; VI = VSS or VDD; unless otherwise specified.
Symbol Parameter
Conditions
VDD
VIH HIGH-level input voltage IO< 1 A
5V
10 V
15 V
VIL LOW-level input voltage IO< 1 A
5V
10 V
15 V
VOH
HIGH-level output voltage
IO< 1 A
5V
10 V
15 V
VOL
LOW-level output voltage
IO< 1 A
5V
10 V
15 V
IOH
HIGH-level output current
VO = 2.5 V
5V
VO = 4.6 V
5V
VO = 9.5 V
10 V
VO = 13.5 V
15 V
IOL
LOW-level output current
VO = 0.4 V
5V
VO = 0.5 V
10 V
VO = 1.5 V
15 V
II input leakage current
15 V
IDD supply current
IO = 0 A
5V
10 V
15 V
CI input capacitance
-
Tamb = 40 C Tamb = 25 C Tamb = 85 C Unit
Min Max Min Max Min Max
3.5 - 3.5 - 3.5 - V
7.0 - 7.0 - 7.0 - V
11.0 - 11.0 - 11.0 - V
- 1.5 - 1.5 - 1.5 V
- 3.0 - 3.0 - 3.0 V
- 4.0 - 4.0 - 4.0 V
4.95 - 4.95 - 4.95 - V
9.95 - 9.95 - 9.95 - V
14.95 - 14.95 - 14.95 - V
- 0.05 - 0.05 - 0.05 V
- 0.05 - 0.05 - 0.05 V
- 0.05 - 0.05 - 0.05 V
- 1.7 - 1.4 - 1.1 mA
- 0.52 - 0.44 - 0.36 mA
- 1.3 - 1.1 - 0.9 mA
- 3.6 - 3.0 - 2.4 mA
0.52 - 0.44 - 0.36 - mA
1.3 - 1.1 - 0.9 - mA
3.6 - 3.0 - 2.4 - mA
- 0.3 - 0.3 - 1.0 A
- 4.0 - 4.0 - 30 A
- 8.0 - 8.0 - 60 A
- 16.0 - 16.0 - 120 A
-
-
- 7.5 -
- pF
HEF4027B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 18 November 2011
© NXP B.V. 2011. All rights reserved.
5 of 14

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HEF4027B arduino
NXP Semiconductors
HEF4027B
Dual JK flip-flop
14. Revision history
Table 11. Revision history
Document ID
Release date Data sheet status
Change notice Supersedes
HEF4027B v.9
Modifications:
20111118
Product data sheet
-
• Legal pages updated.
• Changes in “General description” and “Features and benefits”.
HEF4027B v.8
HEF4027B v.8
20111010
Product data sheet
-
HEF4027B v.7
HEF4027B v.7
20091125
Product data sheet
-
HEF4027B v.6
HEF4027B v.6
20090624
Product data sheet
-
HEF4027B v.5
HEF4027B v.5
20081110
Product data sheet
-
HEF4027B v.4
HEF4027B v.4
20080703
Product specification
-
HEF4027B_CNV v.3
HEF4027B_CNV v.3
19950101
Product specification
-
HEF4027B_CNV v.2
HEF4027B_CNV v.2
19950101
Product specification
-
-
HEF4027B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 18 November 2011
© NXP B.V. 2011. All rights reserved.
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