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PDF EV10AQ190A Data sheet ( Hoja de datos )
| Número de pieza | EV10AQ190A | |
| Descripción | Low power QUAD 10-bit 1.25 Gsps ADC Operating up to 5 Gsps Quadruple Analog to Digital Converter | |
| Fabricantes | e2v | |
| Logotipo |  |
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EV10AQ190A
Low power QUAD 10-bit 1.25 Gsps ADC
Operating up to 5 Gsps
Quadruple Analog to Digital Converter
Datasheet
Main Features
• Quad ADC with 10-bit Resolution Using e2v Proprietary Analog
Input Cross-point Switch
– 1.25 Gsps Sampling Rate in Four-channel Mode
– 2.5 Gsps Sampling Rate in Two-channel Mode
– 5 Gsps Sampling Rate in One-channel Mode
– Built-in four-by-four Cross Point Switch
• Single 2.5 GHz Differential Symmetrical Input Clock
• 500 mVpp Analog Input (Differential AC or DC Coupled)
• ADC Master Reset (LVDS)
• Double Data Rate Output Protocol
• LVDS Output Format
• Digital Interface (SPI) with Reset Signal:
– Channel Mode Selection
– Selectable Bandwidth (Two Available Settings)
– Gain Control
– Offset Control
– Phase Control
– Standby Mode (Full or Partial)
– Binary or Gray Coding Selection
– Test Modes (Ramp, Flashing)
• Power Supplies: 3.3V and 1.8V (Outputs)
• Reduced Clock Induced Transients on Power Supply Pins due to BiCMOS Silicon Technology
• Power Dissipation: 1.4W per Channel
• EBGA380 Package (RoHS, 1.27 mm Pitch)
Performance
• Selectable Full Power Input Bandwidth (–3 dB) up to 3.2 GHz (4-2-1 channel mode)
• Band Flatness: 0.5 dB from DC to 30% of Full Power Input Bandwidth
• Channel-to-Channel Isolation: > 60 dB
• Four-channel Mode (Fsampling = 1.25 Gsps, –1 dBFS)
– Fin= 100 MHz (Bandwidth 1 GHz): ENOB = 8.6 bit, SFDR = 65 dBc, SNR = 53 dB, DNL = ±0.5 LSB, INL = ±0.9 LSB
– Fin= 620 MHz (Full Bandwidth): ENOB = 8 bit, SFDR = 63 dBc, SNR = 48 dB
– Fin= 1.2 GHz (Full Bandwidth): ENOB = 7.7 bit, SFDR = 56 dBc, SNR = 48 dB
• Two-channel or one-channel mode (Fsampling = 2.5 or 5 Gsps, –1 dBFS)
– Fin= 620 MHz (Full Bandwidth): ENOB = 7.9 bit, SFDR = 59 dBc, SNR = 49 dB
– Fin= 1.2 GHz (Full Bandwidth): ENOB = 7.6 bit, SFDR = 56 dBc, SNR = 47.5 dB
• BER: 10–16 at Full Speed
• Latency: Four-channel: 7 Clock Cycles
e2v semiconductors SAS 2013
Visit our website: www.e2v.com
for the latest version of the datasheet
1070B–BDC–05/13
Free Datasheet http://www.datasheet-pdf.com/
1 page  
EV10AQ190A
Please refer to 3-2 ”ADC Timing in Two-channel Mode” on page 17.
Figure 2-4. Two-channel Mode Configuration (Analog Input B and Analog Input C)
CLK
(2.5 GHz)
Inverted
1.25 GHz
Clock
Circuit
In-phase
1. 25 GHz
ADC A
1.25 Gsps
ADC B
1.25 Gsps
ADC C
1.25 Gsps
ADC D
1.25 Gsps
BAI, BAIN
CAI, CAIN
Please refer to 3-2 ”ADC Timing in Two-channel Mode” on page 17.
Figure 2-5. Two-channel Mode Configuration (Analog Input B and Analog Input D)
CLK
(2.5 GHz)
Inverted
1.25 GHz
Clock
Circuit
In-phase
1. 25 GHz
ADC A
1.25 Gsps
ADC B
1.25 Gsps
ADC C
1.25 Gsps
ADC D
1.25 Gsps
BAI, BAIN
DAI, DAIN
Please refer to 3-2 ”ADC Timing in Two-channel Mode” on page 17.
Figure 2-6. One-channel Mode Configuration
CLK
(2.5 GHz)
Clock
Circuit
ADC A
1.25 Gsps
90˚ phase-shifted
1.25 GHz
270˚ phase-shifted
1.25 GHz
ADC B
1.25 Gsps
ADC C
1.25 Gsps
ADC D
1.25 Gsps
In-phase
1.25 GHz
Inverted
1.25 GHz
AAI, AAIN or BAI, BAIN or CAI, CAIN or DAI, DAIN
e2v semiconductors SAS 2013
1070B–BDC–05/13
5
Free Datasheet http://www.datasheet-pdf.com/
5 Page 
EV10AQ190A
3.4 Converter Characteristics
Unless otherwise specified:
Table 3-4.
• VCC = 3.3V, VCCD = 1.8V, VCCO = 1.8V
• –1 dBFS Analog input (full-scale input: VIN – VINN = 500 mVpp)
• Clock input differentially driven; analog input differentially driven
• Test conditions: four-channel mode ON, binary output data format, standby mode OFF, full bandwidth
(unless specified)
Low Frequency Characteristics
Parameter
Test
Level Symbol
Min.
Typ.
Max.
Unit
DC Accuracy
Gain central value (1)
Gain error drift
Input offset voltage (2)
1. 4
4
1. 4
1
325 ppm/C
0 LSB
Four-Channel Mode (Fsampling = 1.25 Gsps, Fin = 100 MHz, –1 dBFS), for Each Channel
DNLrms
1. 4 DNLrms
0.1 0.19
LSB
Differential nonlinearity
1. 4 DNL+
0.5 0.9
LSB
Differential nonlinearity
1. 4 DNL-
–0.9
–0.5
LSB
INLrms
1. 4 INLrms
0.3 0.9
LSB
Integral nonlinearity
1. 4 INL+
0.9 2.5
LSB
Integral nonlinearity
1. 4 INL-
–2.5
–0.9
LSB
Two-Channel Mode (Fsampling = 2.5 Gsps, Fin = 100 MHz, –1 dBFS), for Each Channel
DNLrms
1. 4 DNLrms
0.1 0.19
LSB
Differential nonlinearity
1. 4 DNL+
0.5 0.9
LSB
Differential nonlinearity
1. 4 DNL-
–0.9
–0.5
LSB
INLrms
1. 4 INLrms
0.3 0.9
LSB
Integral nonlinearity
1. 4 INL+
0.9 2.5
LSB
Integral nonlinearity
1. 4 INL-
–2.5
–0.9
LSB
One-Channel Mode (Fsampling = 5 Gsps, Fin = 100 MHz, –1 dBFS)
DNLrms
1. 4 DNLrms
0.1 0.19
LSB
Differential nonlinearity
Differential nonlinearity
1. 4 DNL+
1. 4 DNL-
–0.9
0.5 0.9
–0.5
LSB
LSB
INLrms
Integral nonlinearity
Integral nonlinearity
1. 4 INLrms
1. 4 INL+
1. 4 INL-
–2.5
0.3 0.9
0.8 2.5
–0.8
LSB
LSB
LSB
Notes: 1. Gain central value can be set to 1 via the gain adjustment function of the SPI at register 0x22. Gain central value is mea-
sured at Fin = 100 MHz.
2. Offset can be adjusted to 0 LSB via the offset adjustment function of the SPI at register 0x20.
e2v semiconductors SAS 2013
1070B–BDC–05/13
11
Free Datasheet http://www.datasheet-pdf.com/
11 Page | ||
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| PDF Descargar | [ Datasheet EV10AQ190A.PDF ] | |
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