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HI-574 Schematic ( PDF Datasheet ) - Intersil Corporation

Teilenummer HI-574
Beschreibung Complete/ 12-Bit A/D Converters with Microprocessor Interface
Hersteller Intersil Corporation
Logo Intersil Corporation Logo 




Gesamt 18 Seiten
HI-574 Datasheet, Funktion
August 1997
HI-574A, HI-674A,
HI-774
Complete, 12-Bit A/D Converters
with Microprocessor Interface
Features
• Complete 12-Bit A/D Converter with Reference and Clock
• Full 8-Bit, 12-Bit or 16-Bit Microprocessor Bus Interface
• Bus Access Time . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns
• No Missing Codes Over Temperature
• Minimal Setup Time for Control Signals
• Fast Conversion Times
- HI-574A (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25µs
- HI-674A (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15µs
- HI-774 (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9µs
• Digital Error Correction (HI-774)
• Low Noise, via Current-Mode Signal
Transmission Between Chips
• Byte Enable/Short Cycle (AO Input)
- Guaranteed Break-Before-Make Action, Eliminating
Bus Contention During Read Operation. Latched by
Start Convert Input (To Set the Conversion Length)
• Supply Voltage . . . . . . . . . . . . . . . . . . . . . ±12V to ±15V
Applications
• Military and Industrial Data Acquisition Systems
• Electronic Test and Scientific Instrumentation
• Process Control Systems
Description
The HI-X74(A) is a complete 12-bit, Analog-to-Digital
Converter, including a +10V reference clock, three-state out-
puts and a digital interface for microprocessor control. Succes-
sive approximation conversion is performed by two monolithic
dice housed in a 28 lead package. The bipolar analog die fea-
tures the Intersil Dielectric Isolation process, which provides
enhanced AC performance and freedom from latch-up.
Custom design of each IC (bipolar analog and CMOS digital)
has yielded improved performance over existing versions of
this converter. The voltage comparator features high PSRR
plus a high speed current-mode latch, and provides precise
decisions down to 0.1 LSB of input overdrive. More than 2X
reduction in noise has been achieved by using current
instead of voltage for transmission of all signals between the
analog and digital ICs. Also, the clock oscillator is current
controlled for excellent stability over temperature.
The HI-X74(A) offers standard unipolar and bipolar input
ranges, laser trimmed for specified linearity, gain and offset
accuracy. The low noise buried zener reference circuit is
trimmed for minimum temperature coefficient.
Power requirements are +5V and ±12V to ±15V, with typical
dissipation of 385mW (HI-574A/674A) and 390mW (HI-774) at
12V. All models are available in sidebrazed DIP, PDIP, and
CLCC. For additional HI-Rel screening including 160 hour burn-
in, specify “-8” suffix. For MIL-STD-883 compliant parts, request
HI-574A/883, HI-674A/883, and HI-774/883 data sheets.
Pinouts
(PDIP, SBDIP)
TOP VIEW
(CLCC)
TOP VIEW
+5V SUPPLY, VLOGIC 1
DATA MODE SEL, 12/8 2
CHIP SEL, CS
BYTE ADDR/SHORT
CYCLE, AO
READ/CONVERT, R/C
3
4
5
CHIP ENABLE, CE 6
+12V/+15V SUPPLY, VCC 7
+10V REF, REF OUT 8
ANALOG
COMMON, AC
9
REFERENCE INPUT 10
-12V/-15V SUPPLY, VEE 11
BIPOLAR OFFSET
BIP OFF
12
10V INPUT 13
20V INPUT 14
28 STATUS, STS
27 DB11 MSB
26 DB10
25 DB9
24 DB8
23 DB7
22 DB6
21 DB5
DIGITAL
DATA
OUTPUTS
20 DB4
19 DB3
18 DB2
17 DB1
16 DB0 LSB
15
DIG COMMON,
DC
6 5 4 3 2 1 44 43 42 41 40
NC 7
39 NC
NC 8
38 NC
READ CONVERT, R/C 9
37 DB9
CHIP ENABLE, CE 10
36 DB8
+15V SUPPLY, VCC 11
+10V REFERENCE,
REF OUT
12
ANALOG COMMON, AC 13
REFERENCE INPUT,
REF IN
14
-15V SUPPLY, VEE 15
NC 16
BIPOLAR OFFSET, 17
BIP OFF
18 19 20 21 22 23 24 25 26 27 28
35 DB7
34 DB6
33 DB5
32 DB4
31 DB3
30 NC
29 DB2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
6-952
File Number 3096.4






HI-574 Datasheet, Funktion
HI-574A, HI-674A, HI-774
DC and Transfer Accuracy Specifications Typical at 25oC with VCC = +15V or +12V, VLOGIC = +5V, VEE = -15V or -12V,
Unless Otherwise Specified
PARAMETER
DYNAMIC CHARACTERISTICS
Resolution (Max)
Linearity Error
25oC
-55oC to 125oC (Max)
Max Resolution For Which No Missing Codes Is Guaranteed
25oC
HI-574A, HI-674A
HI-774
TMIN to TMAX
HI-574A, HI-674A
HI-774
Unipolar Offset (Max)
Adjustable to Zero
HI-574A, HI-674A
HI-774
Bipolar Offset (Max)
VIN = 0V (Adjustable to Zero)
VIN = -10V
Full Scale Calibration Error
25oC (Max), With Fixed 50Resistor From REF OUT To REF IN
(Adjustable To Zero)
TMIN to TMAX (No Adjustment At 25oC)
TMIN to TMAX (With Adjustment To Zero At 25oC)
Temperature Coefficients
Guaranteed Max Change, TMIN to TMAX (Using Internal Reference)
Unipolar Offset
Bipolar Offset
Full Scale Calibration
Power Supply Rejection
Max Change In Full Scale Calibration
+13.5V < VCC < +16.5V or +11.4V < VCC < +12.6V
+4.5V < VLOGIC < +5.5V
-16.5V < VEE < -13.5V or -12.6V < VEE < -11.4V
ANALOG INPUTS
Input Ranges
Bipolar
Unipolar
TEMPERATURE RANGE
-2 (-55oC to 125oC)
S SUFFIX T SUFFIX U SUFFIX
12
±1
±1
12
11
11
11
±2
±2
±4
±0.15
±0.25
±0.75
±0.50
12
±1/2
±1
12
12
12
12
±1.5
±2
±4
±0.1
±0.25
±0.50
±0.25
12
±1/2
±1
12
12
12
12
±1
±1
±3
±0.1
±0.15
±0.275
±0.125
±2 ±1
±2 ±2
±20 ±10
±1
±1
±5
±2 ±1 ±1
±1/2 ±1/2 ±1/2
±2 ±1 ±1
-5 to +5
-10 to +10
0 to +10
0 to +20
UNITS
Bits
LSB
LSB
Bits
Bits
Bits
Bits
LSB
LSB
LSB
% of FS
% of FS
% of FS
% of FS
LSB
LSB
LSB
LSB
LSB
LSB
V
V
V
V
6-957

6 Page









HI-574 pdf, datenblatt
HI-574A, HI-674A, HI-774
HI-774
The device driving the HI-774 analog input will see a nominal
load of 5k(10V range) or 10k(20V range). However, the
other end of these input resistors may change as much as
±400mV with each bit decision. These input disturbances
are caused by the internal DAC changing codes which
causes a glitch on the summing junction. This creates abrupt
changes in current at the analog input causing a “kick back”
glitch from the input. Because the algorithm starts with the
MSB, the first glitches will be the largest and get smaller as
the conversion proceeds. These glitches can occur at 350ns
intervals so an op amp with a low output impedance and fast
settling is desirable. Ultimately the input must settle to within
the window of Figure 1 at the bit decision points in order to
achieve 12-bit accuracy.
The HI-774 differs from the most high-speed successive
approximation type ADC’s in that it does not require a high
performance buffer or sample and hold. With error correction
the input can settle while the conversion is underway, but
only during the first 4.8µs. The input must be within 10.76%
of the final value when the MSB decision is made. This
occurs approximately 650ns after the conversion has been
initiated. Digital error correction also loosens the bandwidth
requirements of the buffer or sample and hold. As long as
the input “kick back” disturbances settle within the window of
Figure 1 the device will remain accurate. The combined
effect of settling and the “kick back” disturbances must
remain in the Figure 1 window.
If the design is being optimized for speed, the input device
should have closed loop bandwidth to 3MHz, and a low out-
put impedance (calculated by dividing the open loop output
resistance by the open loop gain). If the application requires
a high speed sample and hold the Intersil HA-5330 or
HA-5320 are recommended.
In any design the input (pin 13 or 14) should be checked
during a conversion to make sure that the input stays within
the correctable window of Figure 1.
Digital Error Correction
HI-774
The HI-774 features the smart successive approximation
register (SSAR) which includes digital error correction. This
has the advantage of allowing the initial input to vary within a
+31 to -32 LSB window about the final value. The input can
move during the first 4.8µs, after which it must remain stable
within ±1/2 LSB. With this feature a conversion can start
before the input has settled completely; however, it must be
within the window as described in Figure 1.
The conversion cycle starts by making the first 8-bit decisions
very quickly, allowing the internal DAC to settle only to 8-bit
accuracy. Then the converter goes through two error correc-
tion cycles. At this point the input must be stable within ±1/2
LSB. These cycles correct the 8-bit word to 12-bit accuracy for
any errors made (up to +16 or -32 LSBs). This is up one count
or down two counts at 8-bit resolution. The converter then
continues to make the 4 LSB decisions, settling out to 12-bit
accuracy. The last four bits can adjust the code in the positive
direction by up to 15 LSBs. This results in a total correction
range of +31 to -32 LSBs. When an 8-bit conversion is per-
formed, the input must settle to within ±1/2 LSB at 8-bit resolu-
tion (which equals ±8 LSBs at 12-bit resolution).
With the HI-774 a conversion can be initiated before the
input has completely settled, as long as it meets the con-
straints of the Figure 1 window. This allows the user to start
conversion up to 4.8µs earlier than with a typical analog to
digital converter. A typical successive approximation type
ADC must have a constant input during a conversion
because once a bit decision is made it is locked in and can-
not change.
32
8-BIT CONVERSION
END OF
16
BIT DECISION POINTS
8
CONVERSION
±1/2 LSB (12 BIT)
0
-8
-16
MSB BIT DECISION
~ 650ns
-31
~ 4.8µs
LAST BIT
DECISION
(12-BIT)
12-BIT CONVERSION
123 4567
CONVERSION
INITIATED
TIME (µs)
8
FIGURE 1. HI-774 ERROR CORRECTION WINDOW vs TIME
-15V
OFFSET
R1
100K
+15V
GAIN
R2
100K
100
100
0V TO +10V
ANALOG
INPUTS
0V TO +20V
2 12/8
3 CS
4 AO
5 R/C
6 CE
STS 28
HIGH BITS
24-27
MIDDLE BITS
20-23
LOW BITS
16-19
10 REF IN
8 REF OUT
12 BIP OFF
+5V 1
13 10VIN
14 20VIN
+15V 7
-15V 11
9 ANA
COM
DIG COM 15
When driving the 20V (pin 14) input, minimize capacitance on pin 13.
FIGURE 2. UNIPOLAR CONNECTIONS
6-963

12 Page





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