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PDF MCP39F501 Data sheet ( Hoja de datos )
| Número de pieza | MCP39F501 | |
| Descripción | Power-Monitoring IC | |
| Fabricantes | Microchip | |
| Logotipo |  |
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MCP39F501
Single-Phase, Power-Monitoring IC with Calculation and Event Detection
Features:
• Power Monitoring Accuracy capable of 0.1% error
across 4000:1 dynamic range
• Fast Calibration Routines
• Programmable Event Notifications such as over-
current and voltage sag, surge protection
• 512 bytes User-accessible EEPROM through
page read/write commands
• Non-volatile On-chip Memory, no external
memory required
• Built-in calculations on fast 16-bit processing core
- Active, Reactive and Apparent Power
- True RMS Current, RMS Voltage
- Line Frequency, Power Factor
• Two-Wire Serial Protocol using a 2-wire Universal
Asynchronous Receiver/Transmitter (UART) inter-
face supporting multiple devices on a single bus
• Low-Drift Internal Voltage Reference, 10 ppm/°C
typical
• 28-lead 5x5 QFN package
• Extended Temperature Range -40°C to +125°C
Applications:
• Real-time Measurement of Input Power for
AC/DC supplies
• Intelligent Power Distribution Units
Functional Block Diagram
OSCI
Timing
Generation
AVDD AGND
OSCO
I1+
+PGA
-
I1-
V1+
+PGA
-
V1-
Internal
Oscillator
24-bit Delta Sigma
Multi-level
Modulator ADC
24-bit Delta Sigma
Multi-level
Modulator ADC
AN_IN/DIO2
10-bit SAR
ADC
Description:
The MCP39F501 is a highly integrated, single-phase
power-monitoring IC designed for real-time
measurement of input power for AC/DC power
supplies, power distribution units and industrial
applications. It includes dual-channel delta sigma
ADCs, a 16-bit calculation engine, EEPROM and a
flexible 2-wire interface. An integrated low-drift voltage
reference with 10 ppm/°C in addition to 94.5 dB of
SINAD performance on each measurement channel
allows for better than 0.1% accurate designs across a
4000:1 dynamic range.
Package Type
MCP39F501
5x5 QFN*
28 27 26 25 24 23 22
MODE/DIR 1
21 AGND
NC 2
20 AN_IN/DIO2
NC 3
UART_RX 4
COMMONA 5
19 V1+
EP 18 V1-
29
17 I1-
OSCI 6
16 I1+
OSCO 7
15 A1/DIO1
8 9 10 11 12 13 14
* Includes Exposed
Thermal Pad (EP); see Table 3-1.
DVDD DGND
16-BIT
CORE
FLASH
Calculation
Engine
(CE)
UART
Serial
Interface
Configurable
Digital Outputs
UART_TX
UART_RX
MODE/DIR
A0/DIO0
A1/DIO1
AN_IN/DIO2
DIO3
2013 Microchip Technology Inc.
DS20005256A-page 1
1 page  
MCP39F501
TABLE 1-1: ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD, DVDD = 2.7 to 3.6 V, TA = -40°C to +125°C,
MCLK = 4 MHz, PGA GAIN = 1.
Characteristic
Sym.
Min.
Typ.
Max. Units
Test Conditions
Differential Non-Linearity
Gain Error
Offset Error
Temperature
Measurement Rate
DNL
GERR
EOFF
— ±1 ±1.5 LSb
— ±1 ±3 LSb
— ±1 ±2 LSb
— fLINE/2N — sps Note 7
Clock and Timings
UART Baud Rate
UDB — 4.8 — kbps See Section 3.2 for
protocol details
Master Clock
and Crystal Frequency
fMCLK
-2%
4
+2%
MHz
Capacitive Loading
on OSCO pin
COSC2
—
— 15 pF When an external clock is
used to drive the device
Internal Oscillator
Tolerance
fINT_OSC
—
2 — % -40 to +85°C only (Note 5)
Internal Voltage Reference
Internal Voltage
Reference Tolerance
VREF
-2%
1.2
+2%
V
Temperature Coefficient
TCVREF
—
10
— ppm/°C TA = -40°C to +85°C,
VREFEXT = 0
Output Impedance
ZOUTVREF
—
2
— k
Current, VREF
AIDDVREF
—
40
— µA
Voltage Reference Input
Input Capacitance
— — 10 pF
Absolute Voltage on
VREF+ Pin
Power Specifications
VREF+
AGND + 1.1V
—
AGND + 1.1V V
Operating Voltage
DVDD Start Voltage
to Ensure Internal
Power-On Reset Signal
AVDD, DVDD
VPOR
2.7
DGND
—
—
3.6 V
0.7 V
DVDD Rise Rate to
Ensure Internal
Power-On Reset Signal
SDVDD
0.05
—
— V/ms 0 – 3.3V in 0.1s, 0 – 2.5V
in 60 ms
AVDD Start Voltage to
Ensure Internal
Power-On Reset Signal
VPOR
AGND
—
2.1 V
AVDD Rise Rate to
Ensure Internal Power On
Reset Signal
SAVDD
0.042
—
— V/ms 0 – 2.4V in 50 ms
Note 1:
2:
3:
4:
5:
6:
7:
Specification by design and characterization; not production tested.
Calculated from reading the register values.
VIN = 1VPP = 353 mVRMS @ 50/60 Hz.
Applies to Voltage Sag and Voltage Surge Events Only.
Variation applies to internal clock and UART only. All calculated output quantities are temperature compensated to the
performance listed in the respective specification.
Applies to all gains. Offset and gain errors depend on the PGA gain setting. See Section 2.0 “Typical Performance
Curves” for typical performance.
N = Value in the AccumulationInternalParameter register (0x005A). The default value of this register is 2 or TCAL = 80 ms
for 50 Hz line.
2013 Microchip Technology Inc.
DS20005256A-page 5
5 Page 
3.12 Analog Input for Temperature
Measurement/Configurable Digital
Output 2 Pin (AN_IN/DIO2)
This is the input to the analog-to-digital converter to be
used for temperature measurement. If temperature
sensing is required in the application, it is advised to
connect the low-power active thermistor
IC™ MCP9700A to this pin.
3.13 Analog Ground Pin (AGND)
AGND is the ground connection to internal analog
circuitry (ADCs, PGA, voltage reference, POR). If an
analog ground pin is available on the PCB, it is
recommended that this pin be tied to that plane.
3.14 Non-inverting Reference
Input/Internal Reference Output
Pin (REFIN+/OUT)
This pin is the non-inverting side of the differential
voltage reference input for the delta sigma ADCs or the
internal voltage reference output.
For optimal performance, bypass capacitances should
be connected between this pin and AGND at all times,
even when the internal voltage reference is used.
However, these capacitors are not mandatory to
ensure proper operation.
3.15 Digital Ground Connection Pins
(DGND)
DGND is the ground connection to internal digital
circuitry (SINC filters, oscillator, serial interface). If a
digital ground plane is available, it is recommended to
tie this pin to the digital plane of the PCB. This plane
should also reference all other digital circuitry in the
system.
3.16 Exposed Thermal Pad (EP)
This pin is the exposed thermal pad. It must be
connected to DGND.
MCP39F501
2013 Microchip Technology Inc.
DS20005256A-page 11
11 Page | ||
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