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PDF CMX602B Data sheet ( Hoja de datos )
| Número de pieza | CMX602B | |
| Descripción | Calling Line Identifier | |
| Fabricantes | CML | |
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CMX602B
CML Microcircuits
Calling Line Identifier
COMMUNICATION SEMICONDUCTORS plus Call Waiting (Type II)
D/602B/2 September 2003
Features
• CLI and CIDCW System Operation
• Low Power Operation 0.5mA at 2.7V
• Zero-Power Ring or Line Reversal
Detector
• FSK Demodulator with Data Retiming
• High Sensitivity CAS Tone Detection
• Low CAS Tone Falsing in CIDCW Mode
Applications
• CLI and CIDCW Adjunct Boxes
• CLI and CIDCW Feature Phones
• Bellcore, ETSI, British Telecom and
Mercury Systems
• Computer Telephone Integration
• Call Logging Systems
• Voice-Mail Equipment
1.1 Brief Description
The CMX602B is a low power CMOS integrated circuit for the reception of the physical layer signals used
in BT's Calling Line Identification Service (CLIP), Bellcore's Calling Identity Delivery System (CID), the
Cable Communications Association's Caller Display Services (CDS), and similar evolving systems. It also
meets the requirements of emerging Caller Identity with Call Waiting services (CIDCW).
The device includes a 'zero-power' ring or line reversal detector, a dual-tone (2130Hz plus 2750Hz) Tone
Alert Signal and a 1200-baud FSK V23/Bell202 compatible asynchronous data demodulator with a data
retiming circuit which removes the need for a UART in the associated µController.
It is suitable for use in systems to BT specifications SIN227 and SIN242, Bellcore GR-30-CORE and
SR-TSV-002476, CCA TW/P&E/312, ETSI ETS 300 659 parts 1 and 2, ETS 300 778 parts 1 and 2 and
Mercury Communications MNR 19.
2003 CML Microsystems Plc
Free Datasheet http://www.datasheet4u.com/
1 page  
Calling Line Identifier
CMX602B
Packages
D4/P3/E4
Signal
Description
Pin No.
12
Name
IRQN
13 DET
14 RXCK
15 RXD
16 VDD
Type
O/P
O/P
I/P (S)
O/P
Power
An open-drain active low output that may be
used as an Interrupt Request / Wake-up input to
the associated µC. An external pull-up resistor
should be connected between this output and
VDD.
A logic level output driven by the Ring or Line
Polarity Reversal Detector, the Tone Alert
Detector or the FSK Level detect circuits,
depending on the operating mode. See section
1.5.1.
An input which may be used to clock received
data bits out of the FSK Data Retiming block.
A logic level output carrying either the raw output
of the FSK Demodulator or re-timed 8-bit
characters depending on the state of the RXCK
input. See section 1.5.6
The positive supply rail. Levels and thresholds
within the device are proportional to this voltage.
Should be decoupled to VSS by a capacitor
mounted close to the device pins.
Notes:
I/P
I/P (S)
O/P
BI
= Input
= Schmitt trigger input
= Output
= Bidirectional
2003 CML Microsystems Plc
5
D/602B/2
Free
Datashe
5 Page 
Calling Line Identifier
CMX602B
applications, the longer (88 to 110ms) Tone Alert signal employed by BT for on-hook applications will not
necessarily cause IRQN to go low.
See section 1.7.1 for definitions of Tton, Ttoff and TqCAS
Figure 6 : Tone Alert Detector operation
1.5.8 Ring or Line Polarity Reversal Detector
These circuits are used to detect the Line Polarity Reversal and Ringing signals associated with the Calling
Line Identification protocol.
Figure 7 illustrates their use in a typical application.
Figure 7 : Ring or Line Polarity Reversal operation
2003 CML Microsystems Plc
11
D/602B/2
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet CMX602B.PDF ] | |
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