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TC58NVG6T2FTA00 Schematic ( PDF Datasheet ) - Toshiba

Teilenummer TC58NVG6T2FTA00
Beschreibung 64 GBIT (8G X 8 BIT) CMOS NAND E2PROM
Hersteller Toshiba
Logo Toshiba Logo 




Gesamt 17 Seiten
TC58NVG6T2FTA00 Datasheet, Funktion
TOSHIBA CONFIDENTIAL TC58NVG6T2FTA00
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
64 GBIT (8G 8 BIT) CMOS NAND E2PROM (Triple-Level-Cell)
DESCRIPTION
The TC58NVG6T2FTA00 is a single 3.3 V 64 Gbit (79,054,700,544 bits) NAND Electrically Erasable and
Programmable Read-Only Memory (NAND E2PROM) organized as (8192 1024) bytes 258 pages 4156 blocks.
The device has four 9216-byte static registers which allow program and read data to be transferred between the
register and the memory cell array in 9216-byte increments. The Erase operation is implemented in a single block
unit (2064 Kbytes 258 Kbytes:9216 bytes x 258 pages).
The TC58NVG6T2FTA00 is a serial-type memory device which utilizes the I/O pins for both address and data
input/output as well as for command inputs. The Erase and Program operations are automatically executed making
the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still
cameras and other systems which require high-density non-volatile memory data storage.
FEATURES
Organization
Memory cell array
Register
Page size
Block size
TC58NVG6T2FTA00
9216 1047.1171875K 8
9216 8
9216 bytes
(2064K 258K) bytes
Modes
Read, Reset, Auto Page Program, Auto Block Erase, Status Read,
Multi Page Program, Multi Block Erase, Multi Page Read
Mode control
Serial input/output
Command control
Number of valid blocks
Min 4000 blocks
Max 4156 blocks
Power supply
VCC 2.7 V to 3.6 V
Access time
Cell array to register 110 s max
Serial Read Cycle
25 ns min
Program/Erase time
Auto Page Program
Auto Block Erase
2000 s/page typ.
3 ms/block typ.
Operating current
Read (25 ns cycle)
Program (avg.)
Erase (avg.)
Standby
50 mA max.
50mA max.
50 mA max.
100 A max
Package
TSOP I 48-P-1220-0.50C (Weight: 0.53 g typ.)
FOR RELIABILITY GUIDANCE, PLEASE REFER TO THE APPLICATION NOTES AND COMMENTS (15).
60 bit ECC for each 1K bytes is required.
1 2010-12-27C
Free Datasheet http://www.datasheet.in/






TC58NVG6T2FTA00 Datasheet, Funktion
TOSHIBA CONFIDENTIAL TC58NVG6T2FTA00
AC TEST CONDITIONS
PARAMETER
CONDITION
2.7 V VCC 3.6 V
Input level
0 V to Vcc
Input pulse rise and fall time
3ns
Input comparison level
Vcc/2
Output data comparison level
Vcc/2
Output load
CL (50 pF) 1 TTL
Note: Busy to ready time depends on the pull-up resistor tied to the RY / BY pin.
(Refer to Application Note (7) toward the end of this document.)
PROGRAMMING AND ERASING CHARACTERISTICS
(Ta 0 to 70°C, VCC 2.7 V to 3.6 V)
SYMBOL
PARAMETER
MIN
TYP.
MAX
UNIT NOTES
tPROG
tDCBSYW1
Average Programming Time
Data Cache Busy Time in Write Cache (following 11h)

2000

6000
10
s
s
tDCBSYW2
Data Cache Busy Time in Write Cache (following 15h)

 10000 s
(2)
tDCBSYW3
N
Data Cache Busy Time in Write Cache (following 1Ah)
Number of Partial Program Cycles in the Same Page

106000 s

(3)
(1)
tBERASE
Block Erasing Time
3 10 ms
(1) Refer to Application Note (10) toward the end of this document.
(2) tDCBSYW2 depends on the timing between internal programming time and data in time.
(3) In case of Program Operation with Data Cache, tDCBSYW3 depends on the timing between internal programming time and data
in time.
Data Output
When tREH is long, output buffers are disabled by /RE=High, and the hold time of data output depend
on tRHOH (25 ns MIN). On this condition, waveforms look like normal serial read mode.
When tREH is short, output buffers are not disabled by /RE=High, and the hold time of data output depend
on tRLOH (5ns MIN). On this condition, output buffers are disabled by the rising edge of CLE, ALE, /CE
or falling edge of /WE, and waveforms look like Extended Data Output Mode.
Data Output can be output synchronously with the clock after 05h+Address*5cycle+E0h sequence.
6 2010-12-27C
Free Datasheet http://www.datasheet.in/

6 Page









TC58NVG6T2FTA00 pdf, datenblatt
TOSHIBA CONFIDENTIAL TC58NVG6T2FTA00
Table 3. Command table (HEX)
First Cycle
Second Cycle
Serial Data Input
Read
Data Out & Column Address Change in Serial Data
Output
Next page Read with WL address increment
Next page Read w/o WL address increment
Set 1st Program Mode
Set 2nd Program Mode
Lower page select
Middle page select
Upper page select
Auto Page Program
Column Address Change in Serial Data Input
Auto Program with Data Cache
Multi Page Program
Input data to page Buffer
Auto Block Erase
ID Read
Status Read
Status Read for Multi-Page Program
Reset
80
00
05
31
3F
09
0D
01
02
03
80
85
80
80
80
60
90
70
71
FF

30
E0


10
15
11
1A
D0



HEX data bit assignment
(Example)
Serial Data Input: 80h
Acceptable while Busy
10000000
8 7 6 5 4 3 2 I/O1
Table 4 shows the operation states for Read mode,when tREH is long.
Table 4. Read mode operation states
CLE
ALE
CE
WE
RE
I/O1 to I/O8
Output select
Output Deselect
H: VIH, L: VIL,
L L L H L Data output
L L L H H High impedance
Power
Active
Active
30
2010-12-27C
Free Datasheet http://www.datasheet.in/

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