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T60N02R Schematic ( PDF Datasheet ) - ON Semiconductor

Teilenummer T60N02R
Beschreibung Power MOSFET ( Transistor )
Hersteller ON Semiconductor
Logo ON Semiconductor Logo 




Gesamt 8 Seiten
T60N02R Datasheet, Funktion
NTD60N02R
Power MOSFET
62 A, 24 V, N−Channel, DPAK
Features
Planar HD3e Process for Fast Switching Performance
Low RDS(on) to Minimize Conduction Loss
Low Ciss to Minimize Driver Loss
Low Gate Charge
Optimized for High Side Switching Requirements in
High−Efficiency DC−DC Converters
Pb−Free Packages are Available
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Thermal Resistance
Junction−to−Case
Total Power Dissipation @ TC = 25°C
Drain Current
Continuous @ TC = 25°C, Chip
Continuous @ TC = 25°C, Limited by Package
Continuous @ TA = 25°C, Limited by Wires
VDSS
VGS
RqJC
PD
ID
ID
ID
24 Vdc
±20 Vdc
2.6 °C/W
58 W
62 A
50 A
32 A
Thermal Resistance
Junction−to−Ambient (Note 1)
Total Power Dissipation @ TA = 25°C
Drain Current − Continuous @ TA = 25°C
RqJA
PD
ID
80 C/W
1.87 W
10.5 A
Thermal Resistance
Junction−to−Ambient (Note 2)
Total Power Dissipation @ TA = 25°C
Drain Current − Continuous @ TA = 25°C
Operating and Storage Temperature
RqJA
PD
ID
TJ, and
Tstg
120 °C/W
1.25 W
8.5 A
−55 to °C
175
Single Pulse Drain−to−Source Avalanche Energy
− Starting TJ = 25°C
(VDD = 50 Vdc, VGS = 10.0 Vdc,
IL = 11 Apk, L = 1.0 mH, RG = 25 W)
Maximum Lead Temperature for Soldering
Purposes, 1/8from case for 10 seconds
EAS
TL
60 mJ
260 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR4 board using 0.5 in sq drain pad size.
2. When surface mounted to an FR4 board using the minimum recommended
pad size.
http://onsemi.com
V(BR)DSS
24 V
RDS(on) TYP
8.4 mW @ 10 V
ID MAX
62 A
N−Channel
D
G
S
44
4
12
3
12
3
1
2
3
CASE 369AA CASE 369C
CASE 369D
DPAK
DPAK
DPAK
(Surface Mount) (Surface Mount) (Straight Lead)
STYLE 2
STYLE 2
STYLE 2
MARKING DIAGRAM
& PIN ASSIGNMENTS
4
Drain
4
Drain
1
Gate
2
Drain
3
Source
12 3
Gate Drain Source
Y = Year
WW = Work Week
60N02R = Device Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2004
December, 2004 − Rev. 10
1
Publication Order Number:
NTD60N02R/D
Free Datasheet http://www.datasheet4u.com/






T60N02R Datasheet, Funktion
NTD60N02R
PACKAGE DIMENSIONS
DPAK
CASE 369C−01
ISSUE O
B
VR
−T−
SEATING
PLANE
C
E
S
F
4
1 23
A
K
J
LH
D 2 PL
G 0.13 (0.005) M T
U
Z
SOLDERING FOOTPRINT*
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES
DIM MIN MAX
A 0.235 0.245
B 0.250 0.265
C 0.086 0.094
D 0.027 0.035
E 0.018 0.023
F 0.037 0.045
G 0.180 BSC
H 0.034 0.040
J 0.018 0.023
K 0.102 0.114
L 0.090 BSC
R 0.180 0.215
S 0.025 0.040
U 0.020 −−−
V 0.035 0.050
Z 0.155 −−−
MILLIMETERS
MIN MAX
5.97 6.22
6.35 6.73
2.19 2.38
0.69 0.88
0.46 0.58
0.94 1.14
4.58 BSC
0.87 1.01
0.46 0.58
2.60 2.89
2.29 BSC
4.57 5.45
0.63 1.01
0.51 −−−
0.89 1.27
3.93 −−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
5.80
0.228
6.20
0.244
2.58
0.101
3.0
0.118
1.6 6.172
0.063 0.243
ǒ ǓSCALE 3:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
Free Datasheet http://www.datasheet4u.com/

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