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PDF APA2613A Data sheet ( Hoja de datos )

Número de pieza APA2613A
Descripción 8W Stereo Class-D Audio Power Amplifier
Fabricantes ANPEC 
Logotipo ANPEC Logotipo



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APA2613A
8W Stereo Class-D Audio Power Amplifier
Features
General Description
Supply Voltage is 8V ~ 26V
Class D operation eliminates heat sink & reduce
power supply requirement
20,26, 32, 36, 4 steps gain setting
8W per channel (THD+N=10%)output power into
8load at 12V, Class D output
MONO function combines two channels’output to
supply 12W into a 4load at 12V (THD+N=10%)
Adjustable Power limit function plus DC Protec-
tion
Thermal and Over-Current Protections with Auto-
Recovery option
TSSOP-28P with thermal pad packages
QFN4x4-28 with thermal pad packages
Applications
The APA2613A is a stereo, high efficiency, Class-D audio
amplifier available in TSSOP-28Pand QFN4x4-28A pins
packages.
The Class-D power amplifier has higher efficiency com-
pare to the tradition Class-AB power amplifier. The filter-
free Class-D architecture eliminates the external low pass
filters. The internal gain setting can minimum the exter-
nal component counts, and for the flexible application the
gain can be set to 4-step 20, 26, 32, 36dB by gain control
ins (GAIN0 and GAIN1). The power limit function cans
protection the speaker when output signal excess the
speaker limit rating.
The integration of Class-D power amplifier is a best so-
lution for power efficiency and lower the total BOM costs.
The operating voltage is from 8V to 26V. The APA2613A
power amplifiers are capable of driving 6 W at V =10V
DD
into 8speaker, and provides thermal and over-current
protections also can detection the DC that prevent to de-
stroy the speaker voice coil.
Pin Configuration
LCD Monitor
AIO
Simplified Application Circuit
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright © ANPEC Electronics Corp.
Rev. A.1 - Jan., 2013
1
www.anpec.com.tw
Free Datasheet http://www.datasheet4u.com/

1 page




APA2613A pdf
APA2613A
Mono Mode
V =12V, GND=0V, A =36dB, T = 25οC (unless otherwise noted).
DD V A
Symbol
Parameter
Test Conditions
VDD = 12V TA = 25 C
PO Output Power
THD+N Total Harmonic Distortion Plus Noise
SNR
Attshutdown
VOS
Vn
Signal-To-Noise Ratio
Shutdown Attenuation
Offset Voltage
Noise Output Voltage
THD+N = 1%
FIN=1kHz
RL = 4
THD+N = 10%
FIN=1kHz
RL = 4
FIN=1kHz
RL = 4
PO = 6W
Maximum output at THD+N<1%,
FIN=1kHz, Gain = 20dB, A-weighted
FIN=1kHz, RL = 8, Vin = 1Vrms
AV = 20dB
With A-weighted Filter (AV = 20dB)
APA2613A
Min. Typ. Max.
-9-
- 12 -
- 0.1 -
- 95 -
- -100 -
- - 15
- 120 -
Unit
W
%
dB
mV
µV (rms)
Copyright © ANPEC Electronics Corp.
Rev. A.1 - Jan., 2013
5
www.anpec.com.tw
Free Datasheet http://www.datasheet4u.com/

5 Page





APA2613A arduino
APA2613A
Pin Description
PIN
NO.
TSSOP
-28P
QFN4x4
-28
14
NAME
SD
2
3
4
5
6
7
8
9
10
11
12
13
14
15,16
17
18
19, 24
20
21
22
23
25
26
27,28
5 FLAG
6 LINP
7 LINN
9 GAIN0
10 GAIN1
11 AVDD
12 AGND
13 VCLAMP
14 PLIMIT
15
16
8, 17
18
RINN
RINP
NC
MONO
19 RPVDD
20
21
22, 28, 25
23
24
26
27
1
2
RBSP
ROUTP
PGND
ROUTN
RBSN
LBSN
LOUTN
LOUTP
LBSP
3 LPVDD
I/O/P
I
O
I
I
I
I
P
P
O
I
I
I
I
P
I
O
P
O
I
I
O
O
I
P
FUNCTION
Shutdown logic input for audio amp (Low=outputs disabled, High=output
enabled). TTL logic levels with compliance to AVDD.
Protection flag output (open drain). Connecting FLAG and SD can be set to
auto-recovery. Otherwise need to reset by cyding AVDD
Positive audio input for left channel. Biased at VCLAMP/2.
Negative audio input for left channel. Biased at VCLAMP/2.
Gain select least significant bit. TTL logic levels with compliance to AVDD.
Gain select least significant bit. TTL logic levels with compliance to AVDD.
Analog supply.
Analog signal ground. Connect to the thermal pad.
Regulated voltage, Nominal voltage is 5V.
Power limit level adjust. Connect a resistor divider from VCLAMP to GND to
set power limit. Connect directly to VCLAMP for no power limit.
Negative audio input for right channel. Biased at VCLAMP/2.
Positive audio input for right channel. Biased at VCLAMP/2.
Not connected.
Parallel BTL mode switch.
Power supply for right channel H-bridge. Right channel and left channel power
supply inputs are connected internally.
Bootstrap I/O for right channel, positive high-side FET.
Class-D H-bridge positive output for right channel.
Power ground for the H-bridges.
Class-D H-bridge negative output for right channel.
Bootstrap I/O for right channel, negative high-side FET.
Bootstrap I/O for left channel, negative high-side FET.
Class-D H-bridge negative output for left channel.
Class-D H-bridge positive output for left channel.
Bootstrap I/O for left channel, positive high-side FET.
Power supply for left channel H-bridge. Right channel and left channel power
supply inputs are connected internally.
Copyright © ANPEC Electronics Corp.
Rev. A.1 - Jan., 2013
11
www.anpec.com.tw
Free Datasheet http://www.datasheet4u.com/

11 Page







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