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ADRF6701 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADRF6701
Beschreibung 400 MHz to 1250 MHz Quadrature Modulator
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
ADRF6701 Datasheet, Funktion
Data Sheet
400 MHz to 1250 MHz Quadrature Modulator with
750 MHz to 1150 MHz Frac-N PLL and Integrated VCO
ADRF6701
FEATURES
IQ modulator with integrated fractional-N PLL
Output frequency range: 400 MHz to 1250 MHz
Internal LO frequency range: 750 MHz to 1150 MHz
Output P1dB: 10.3 dBm @ 1100 MHz
Output IP3: 30.1 dBm @ 1100 MHz
Noise floor: −159.4 dBm/Hz @ 1100 MHz
Baseband bandwidth: 750 MHz (3 dB)
SPI serial interface for PLL programming
Integrated LDOs and LO buffer
Power supply: 5 V/240 mA
40-lead 6 mm × 6 mm LFCSP
APPLICATIONS
Cellular communications systems
GSM/EDGE, CDMA2000, W-CDMA, TD-SCDMA, LTE
Broadband wireless access systems
Satellite modems
GENERAL DESCRIPTION
The ADRF6701 provides a quadrature modulator and
synthesizer solution within a small 6 mm × 6 mm footprint
while requiring minimal external components.
The ADRF6701 is designed for RF outputs from 400 MHz to
1250 MHz. The low phase noise VCO and high performance
quadrature modulator make the ADRF6701 suitable for next
generation communication systems requiring high signal
dynamic range and linearity. The integration of the IQ
modulator, PLL, and VCO provides for significant board
savings and reduces the BOM and design complexity.
The integrated fractional-N PLL/synthesizer generates a 2× fLO
input to the IQ modulator. The phase detector together with an
external loop filter is used to control the VCO output. The VCO
output is applied to a quadrature divider. To reduce spurious
components, a sigma-delta (Σ-Δ) modulator controls the
programmable PLL divider.
The IQ modulator has wideband differential I and Q inputs,
which support baseband as well as complex IF architectures.
The single-ended modulator output is designed to drive a
50 Ω load impedance and can be disabled.
The ADRF6701 is fabricated using an advanced silicon-
germanium BiCMOS process. It is available in a 40-lead,
exposed-paddle, Pb-free, 6 mm × 6 mm LFCSP package.
Performance is specified from −40°C to +85°C. A lead-free
evaluation board is available.
Table 1.
Part No.
ADRF6701
ADRF6702
ADRF6703
Internal LO Range
750 MHz
1150 MHz
1550 MHz
2150 MHz
2100 MHz
2600 MHz
IQ Modulator
±3 dB RF Output Range
400 MHz
1250 MHz
1200 MHz
2400 MHz
1550 MHz
2650 MHz
VCC7
34
VCC6
29
FUNCTIONAL BLOCK DIAGRAM
VCC5
27
VCC4
22
VCC3
17
VCC2
10
VCC1
1
LOSEL 36
ADRF6701
LON 37
LOP 38
BUFFER
DIVIDER
÷2
BUFFER
DATA 12
CLK 13
LE 14
REFIN 6
MUXOUT 8
SPI
INTERFACE
×2
MUX
÷2
÷4
FRACTION
REG
MODULUS
INTEGER
REG
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
N COUNTER
21 TO 123
TEMP
SENSOR
+
PHASE
FREQUENCY
DETECTOR
PRESCALER
÷2
CHARGE PUMP
250µA,
500µA (DEFAULT),
750µA,
1000µA
4 7 11 15 20 21 23 25 28 30 31 35 24
5
GND
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
NC RSET
Figure 1.
2:1
MUX
DIVIDER
÷2
VCO
CORE
3 39 16 26
CP VTUNE ENOP RFOUT
÷2
0/90
40 DECL3
9 DECL2
2 DECL1
18 QP
19 QN
32 IN
33 IP
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
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ADRF6701 Datasheet, Funktion
ADRF6701
Data Sheet
TIMING CHARACTERISTICS
Table 3.
Parameter
t1
t2
t3
t4
t5
t6
t7
Limit
20
10
10
25
25
10
20
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
Test Conditions/Comments
LE to CLK setup time
DATA to CLK setup time
DATA to CLK hold time
CLK high duration
CLK low duration
CLK to LE setup time
LE pulse width
CLK
DATA
DB23 (MSB)
LE
t4 t5
t2 t3
DB22
DB2
(CONTROL BIT C3)
DB1
(CONTROL BIT C2)
DB0 (LSB)
(CONTROL BIT C1)
t6
t7
t1
Figure 2. Timing Diagram
Rev. 0 | Page 6 of 36
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ADRF6701 pdf, datenblatt
ADRF6701
0
–10
–20
TTTAAA
=
=
=
–40°C
+25°C
+85°C
–30
–40
–50
–60
–70 3.5kHz LOOP FILTER
–80
–90
–100
–110
–120
–130 130kHz LOOP FILTER
–140
–150
–160
1k
10k 100k 1M 10M 100M
OFFSET FREQUENCY (Hz)
Figure 16. Phase Noise vs. Offset Frequency and Temperature, fLO = 800 MHz
0
–10
–20
TTTAAA
=
=
=
–40°C
+25°C
+85°C
–30
–40
–50
–60 3.5kHz LOOP FILTER
–70
–80
–90
–100
–110
–120
–130 130kHz LOOP FILTER
–140
–150
–160
1k
10k 100k 1M 10M 100M
OFFSET FREQUENCY (Hz)
Figure 17. Phase Noise vs. Offset Frequency and Temperature, fLO = 950 MHz
0
–10
–20
TTTAAA
=
=
=
–40°C
+25°C
+85°C
–30
–40
–50
–60 3.5kHz LOOP FILTER
–70
–80
–90
–100
–110
–120
–130 130kHz LOOP FILTER
–140
–150
–160
1k
10k 100k 1M 10M 100M
OFFSET FREQUENCY(Hz)
Figure 18. Phase Noise vs. Offset Frequency and Temperature, fLO = 1100 MHz
Data Sheet
1.0
0.9
TTTAAA
=
=
=
–40°C
+25°C
+85°C
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
750 800 850 900 950 1000 1050 1100 1150
LO FREQUENCY (MHz)
Figure 19. Integrated Phase Noise vs. LO Frequency
–80
–90
–100
OFFSET = 1kHz
TTTAAA
=
=
=
–40°C
+25°C
+85°C
–110
–120
OFFSET = 100kHz
–130
–140
OFFSET = 5MHz
–150
750 800 850 900 950 1000 1050 1100 1150
LO FREQUENCY (MHz)
Figure 20. Phase Noise vs. LO Frequency at 1 kHz, 100 kHz, and 5 MHz Offsets
–80
–90
–100
TTTAAA
=
=
=
–40°C
+25°C
+85°C
–110
OFFSET = 10kHz
–120
–130
OFFSET = 1MHz
–140
–150
–160
750 800 850 900 950 1000 1050 1100 1150
LO FREQUENCY (MHz)
Figure 21. Phase Noise vs. LO Frequency at 10 kHz and 1 MHz Offsets
Rev. 0 | Page 12 of 36
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