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K4B2G0446B Schematic ( PDF Datasheet ) - Samsung

Teilenummer K4B2G0446B
Beschreibung 2Gb B-die DDR3 SDRAM
Hersteller Samsung
Logo Samsung Logo 




Gesamt 30 Seiten
K4B2G0446B Datasheet, Funktion
Rev. 1.41, Nov. 2010
K4B2G0446B
K4B2G0846B
K4B2G1646B
2Gb B-die DDR3 SDRAM
78 / 96 FBGA with Lead-Free & Halogen-Free
(RoHS compliant)
datasheet
SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
SPECIFICATIONS WITHOUT NOTICE.
Products and specifications discussed herein are for reference purposes only. All information discussed
herein is provided on an "AS IS" basis, without warranties of any kind.
This document and all information discussed herein remain the sole and exclusive property of Samsung
Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property
right is granted by one party to the other party under this document, by implication, estoppel or other-
wise.
Samsung products are not intended for use in life support, critical care, medical, safety equipment, or
similar applications where product failure could result in loss of life or personal or physical harm, or any
military or defense application, or any governmental procurement to which special terms or provisions
may apply.
For updates or additional information about Samsung products, contact your nearest Samsung office.
All brand names, trademarks and registered trademarks belong to their respective owners.
2010 Samsung Electronics Co., Ltd. All rights reserved.
-1-
Free Datasheet http://www.datasheet4u.com/






K4B2G0446B Datasheet, Funktion
K4B2G0446B
K4B2G0846B
K4B2G1646B
datasheet
3. Package pinout/Mechanical Dimension & Addressing
3.1 x4 Package Pinout (Top view) : 78ball FBGA Package
Rev. 1.41
DDR3 SDRAM
1
2
3 456 7
8
9
A VSS
VDD
NC
B
VSS
VSSQ
DQ0
C VDDQ DQ2 DQS
D VSSQ NC DQS
E
VREFDQ
VDDQ
NC
F NC VSS RAS
G ODT VDD CAS
H NC CS WE
J
VSS
BA0
BA2
K VDD
A3
A0
L VSS
A5
A2
M VDD
A7
A9
N VSS RESET A13
NC
DM
DQ1
VDD
NC
CK
CK
A10/AP
NC
A12/BC
A1
A11
A14
VSS
VSSQ
DQ3
VSS
NC
VSS
VDD
ZQ
VREFCA
BA1
A4
A6
A8
VDD
VDDQ
VSSQ
VSSQ
VDDQ
NC
CKE
NC
VSS
VDD
VSS
VDD
VSS
A
B
C
D
E
F
G
H
J
K
L
M
N
Ball Locations (x4)
Populated ball
Ball not populated
Top view
(See the balls through the package)
123456789
A
B
C
D
E
F
G
H
J
K
L
M
N
-6-
Free Datasheet http://www.datasheet4u.com/

6 Page









K4B2G0446B pdf, datenblatt
K4B2G0446B
K4B2G0846B
K4B2G1646B
datasheet
Rev. 1.41
DDR3 SDRAM
5. DDR3 SDRAM Addressing
1Gb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
BC switch on the fly
Page size *1
256Mb x 4
8
BA0 - BA2
A10/AP
A0 - A13
A0 - A9,A11
A12/BC
1 KB
128Mb x 8
8
BA0 - BA2
A10/AP
A0 - A13
A0 - A9
A12/BC
1 KB
64Mb x 16
8
BA0 - BA2
A10/AP
A0 - A12
A0 - A9
A12/BC
2 KB
2Gb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
BC switch on the fly
Page size *1
512Mb x 4
8
BA0 - BA2
A10/AP
A0 - A14
A0 - A9,A11
A12/BC
1 KB
256Mb x 8
8
BA0 - BA2
A10/AP
A0 - A14
A0 - A9
A12/BC
1 KB
128Mb x 16
8
BA0 - BA2
A10/AP
A0 - A13
A0 - A9
A12/BC
2 KB
4Gb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
BC switch on the fly
Page size *1
1Gb x 4
8
BA0 - BA2
A10/AP
A0 - A15
A0 - A9,A11
A12/BC
1 KB
512Mb x 8
8
BA0 - BA2
A10/AP
A0 - A15
A0 - A9
A12/BC
1 KB
256Mb x 16
8
BA0 - BA2
A10/AP
A0 - A14
A0 - A9
A12/BC
2 KB
8Gb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
BC switch on the fly
Page size *1
2Gb x 4
8
BA0 - BA2
A10/AP
A0 - A15
A0 - A9,A11,A13
A12/BC
2 KB
1Gb x 8
8
BA0 - BA2
A10/AP
A0 - A15
A0 - A9,A11
A12/BC
2 KB
512Mb x 16
8
BA0 - BA2
A10/AP
A0 - A15
A0 - A9
A12/BC
2 KB
NOTE 1 : Page size is the number of bytes of data delivered from the array to the internal sense amplifiers when an ACTIVE command is registered.
Page size is per bank, calculated as follows:
page size = 2 COLBITS * ORG÷8
where, COLBITS = the number of column address bits, ORG = the number of I/O (DQ) bits
- 12 -
Free Datasheet http://www.datasheet4u.com/

12 Page





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