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PDF K40P100M100SF2V2 Data sheet ( Hoja de datos )
| Número de pieza | K40P100M100SF2V2 | |
| Descripción | K40 Sub-Family | |
| Fabricantes | Freescale Semiconductor | |
| Logotipo |  |
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Freescale Semiconductor
Data Sheet: Advance Information
Document Number: K40P100M100SF2V2
Rev. 1, 6/2012
K40 Sub-Family
Supports the following:
MK40DN512VLL10
Features
• Operating Characteristics
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
• Performance
– Up to 100 MHz ARM Cortex-M4 core with DSP
instructions delivering 1.25 Dhrystone MIPS per
MHz
• Memories and memory interfaces
– Up to 512 KB program flash memory on non-
FlexMemory devices
– Up to 128 KB RAM
– Serial programming interface (EzPort)
• Clocks
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
• System peripherals
– Multiple low-power modes to provide power
optimization based on application requirements
– Memory protection unit with multi-master
protection
– 16-channel DMA controller, supporting up to 63
request sources
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
K40P100M100SF2V2
• Analog modules
– Two 16-bit SAR ADCs
– Programmable gain amplifier (PGA) (up to x64)
integrated into each ADC
– 12-bit DAC
– Two transimpedance amplifiers
– Three analog comparators (CMP) containing a 6-bit
DAC and programmable reference input
– Voltage reference
• Timers
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
timer
– Two 2-channel quadrature decoder/general purpose
timers
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
• Communication interfaces
– USB full-/low-speed On-the-Go controller with on-
chip transceiver
– Two Controller Area Network (CAN) modules
– Three SPI modules
– Two I2C modules
– Five UART modules
– Secure Digital host controller (SDHC)
– I2S module
• Security and integrity modules
– Hardware CRC module to support fast cyclic
redundancy checks
– 128-bit unique identification (ID) number per chip
• Human-machine interface
– Segment LCD controller supporting up to 40
frontplanes and 8 backplanes, or 44 frontplanes and
4 backplanes, depending on the package size
– Low-power hardware touch sensor interface (TSI)
– General-purpose input/output
This document contains information on a new product. Specifications and
information herein are subject to change without notice.
© 2012 Freescale Semiconductor, Inc.
Preliminary
General Business Information
Free Datasheet http://www.datasheet4u.com/
1 page  
Field
FFF
Description
Program flash memory size
R Silicon revision
T Temperature range (°C)
PP Package identifier
CC Maximum CPU frequency (MHz)
N Packaging type
Terminology and guidelines
Values
• 32 = 32 KB
• 64 = 64 KB
• 128 = 128 KB
• 256 = 256 KB
• 512 = 512 KB
• 1M0 = 1 MB
• Z = Initial
• (Blank) = Main
• A = Revision after main
• V = –40 to 105
• C = –40 to 85
• FM = 32 QFN (5 mm x 5 mm)
• FT = 48 QFN (7 mm x 7 mm)
• LF = 48 LQFP (7 mm x 7 mm)
• LH = 64 LQFP (10 mm x 10 mm)
• MP = 64 MAPBGA (5 mm x 5 mm)
• LK = 80 LQFP (12 mm x 12 mm)
• MB = 81 MAPBGA (8 mm x 8 mm)
• LL = 100 LQFP (14 mm x 14 mm)
• ML = 104 MAPBGA (8 mm x 8 mm)
• MC = 121 MAPBGA (8 mm x 8 mm)
• LQ = 144 LQFP (20 mm x 20 mm)
• MD = 144 MAPBGA (13 mm x 13 mm)
• MJ = 256 MAPBGA (17 mm x 17 mm)
• 5 = 50 MHz
• 7 = 72 MHz
• 10 = 100 MHz
• 12 = 120 MHz
• 15 = 150 MHz
• R = Tape and reel
• (Blank) = Trays
2.4 Example
This is an example part number:
MK40DN512ZVMD10
3 Terminology and guidelines
3.1 Definition: Operating requirement
An operating requirement is a specified value or range of values for a technical
characteristic that you must guarantee during operation to avoid incorrect operation and
possibly decreasing the useful life of the chip.
Freescale Semiconductor, Inc.
K40 Sub-Family Data Sheet, Rev. 1, 6/2012.
Preliminary
General Business Information
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
Symbol
IDD
VDIO
VAIO
ID
VDDA
VUSB_DP
VUSB_DM
VREGIN
VBAT
Description
Digital supply current
Digital input voltage (except RESET, EXTAL, and XTAL)
Analog1, RESET, EXTAL, and XTAL input voltage
Maximum current single pin limit (applies to all port pins)
Analog supply voltage
USB_DP input voltage
USB_DM input voltage
USB regulator input
RTC battery supply voltage
Min.
—
–0.3
–0.3
–25
VDD – 0.3
–0.3
–0.3
–0.3
–0.3
Max.
185
5.5
VDD + 0.3
25
VDD + 0.3
3.63
3.63
6.0
3.8
1. Analog pins are defined as pins that do not have an associated general purpose I/O port function.
General
Unit
mA
V
V
mA
V
V
V
V
V
5 General
5.1 AC electrical characteristics
Unless otherwise specified, propagation delays are measured from the 50% to the 50%
point, and rise and fall times are measured at the 20% and 80% points, as shown in the
following figure.
Figure 1. Input signal measurement reference
All digital I/O switching characteristics assume:
1. output pins
• have CL=30pF loads,
• are configured for fast slew rate (PORTx_PCRn[SRE]=0), and
• are configured for high drive strength (PORTx_PCRn[DSE]=1)
2. input pins
• have their passive filter disabled (PORTx_PCRn[PFE]=0)
Freescale Semiconductor, Inc.
K40 Sub-Family Data Sheet, Rev. 1, 6/2012.
Preliminary
General Business Information
11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
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