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PDF TM032LDH05 Data sheet ( Hoja de datos )
| Número de pieza | TM032LDH05 | |
| Descripción | Display Module | |
| Fabricantes | TIANMA | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TM032LDH05 (archivo pdf) en la parte inferior de esta página. Total 27 Páginas | ||
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1 page  
SHANGHAI TIANMA MICRO-ELECTRONICS
2 Input/Output Terminals
2.1 TFT LCD Panel
TM032LDH05 V1.0
No SYMBOL I/O
Description
Remark
1
GND
P Ground
2
NC/YD
-- Reserved
3 NC/XR -- Reserved
4
NC/YU
-- Reserved
5
NC/XL
-- Reserved
6
GND
P Ground
7 BS1 I Interface selection
Note 2
8 BS0 I Interface selection
Note 2
9 FMARK/NC O Tearing effect output. If not used, please open this pin
10
PWM_OUT/N
C
O PWM control signal output
11 LCD_ID O ID pin,2.783V(under typical input voltage 2.8V)
12 RESET
I Reset signal; Must be reset after power is supplied
13 D17
I Data input
14 D16
I Data input
15 D15
I Data input
16 D14
I Data input
17 D13
I Data input
18 D12
I Data input
19 D11
20 D10
I Data input
I Data input
21 D9
I Data input
22 D8
I Data input
23 D7
I Data input
24 D6
I Data input
25 D5
I Data input
26 D4
I Data input
27 D3
I Data input
28 D2
I Data input
29 D1
I Data input
30 D0
I Data input
31 RD
I Read signal
32 WR
I Write signal
33 RS
I
Command or parameter select signal; Low: command;
High: parameter
34 CS
I
Chip select signal, low: chip can be accessed;
Must be connected to GND if not used
35 GND P Ground
36 IOVCC P Digital I/O power supply
37 VCC P Digital power supply
The information contained herein is the exclusive property of SHANGHAI TIANMA MICRO-ELECTRONICS
Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of SHANGHAI TIANMA MICRO-ELECTRONICS Corporation.
Page 5 of 27
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5 Page 
SHANGHAI TIANMA MICRO-ELECTRONICS
TM032LDH05 V1.0
5.2 Interface Timing Parameters
Normal Write Mode
Signal Symbol
Parameter
RS
CS
WR
RD
RD
D[17:0]
tAST
tAHT
tCHW
tCS
tRCS
tRCSFM
tCSF
tCSH
tWC
tWRH
tWRL
tRC
tRDH
tRDL
tRCFM
tRDHFM
tRDLFM
tDST
tDHT
tRAT
tRATFM
tODH
Address setup time
Address hold time(Write/Read)
Chip select “H” pulse width
Chip select setup time (Write)
Chip select setup time (Read ID)
Chip select setup time (Read FM)
Chip select wait time(Write/Read)
Chip select hold time
Write cycle
Control pulse “H” duration
Control pulse “L” duration
Read cycle (ID)
Control pulse “H” duration (ID)
Control pulse “L” duration (ID)
Read cycle (FM)
Control pulse “H” duration (FM)
Control pulse “L” duration (FM)
Data setup time
Data hold time
Read access time (ID)
Read access time (FM)
Output disable time
Min.
10
10
0
35
100
100
10
10
100
20
20
150
40
50
250
50
150
20
20
-
-
20
Spec.
Max.
-
-
-
-
-
-
-
70
100
80
Unit
ns
ns
ns
ns
ns
ns
Description
-
-
-
When read ID data
When read from
frame memory
For maximum
CL=30pF
For minimum
CL=8pF
The information contained herein is the exclusive property of SHANGHAI TIANMA MICRO-ELECTRONICS
Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of SHANGHAI TIANMA MICRO-ELECTRONICS Corporation.
Page 11 of 27
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11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet TM032LDH05.PDF ] | |
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