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Teilenummer | TM035PDHV04 |
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Beschreibung | Display Module | |
Hersteller | TIANMA | |
Logo | ||
Gesamt 27 Seiten SHANGHAI TIANMA MICRO-ELECTRONICS
Coversheet
TM035PDHV04 V1.0
MODEL NO. :
ISSUED DATE:
VERSION
:
TM035PDHV04
2010-10-20
Ver 1.0
■Preliminary Specification
□Final Product Specification
Customer :
Approved by
Notes
SHANGHAI TIANMA Confirmed :
Prepared by
Checked by
Approved by
This technical specification is subjected to change without notice
The information contained herein is the exclusive property of SHANGHAI TIANMA MICRO-ELECTRONICS
Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of SHANGHAI TIANMA MICRO-ELECTRONICS Corporation.
Page 1 of 27
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SHANGHAI TIANMA MICRO-ELECTRONICS
TM035PDHV04 V1.0
35 /WR/SCL
I (WR) Write data enable pin in DBI Type B;
(SCL) Write data enable pin in DBI Type C;
If not used, please connect this pin to IOVCC
36 RS
37 /CS
38 LEDK6
39 LEDK5
40 LEDK4
41 LEDK3
42 LEDK2
43 LEDK1
44 LEDA
45 LCM_ID
Data/command selection pin.
I RS=1,select data; RS=0,select command.
If not used, please connect this pin to GND.
I Chip select signal, signal is "low" enable
P LED cathode
P LED cathode
P LED cathode
P LED cathode
P LED cathode
P LED cathode
P LED anode
O
Customer Identification Pin
(LCM_ID=0.5V when VCC=2.8V)
Note2-1: I/O definition:
I-----Input O---Output P----Power/Ground
Note 2-2: Select the MPU system interface mode
The information contained herein is the exclusive property of SHANGHAI TIANMA MICRO-ELECTRONICS
Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of SHANGHAI TIANMA MICRO-ELECTRONICS Corporation.
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6 Page SHANGHAI TIANMA MICRO-ELECTRONICS
TM035PDHV04 V1.0
5.1.3 DBI Type B(18/16/9/8 bit)Interface Timing Characteristics
RS
/CS
/WR
DB [17:0]
RD
DB [17:0]
5.1.4 Interface Timing Parameters
Normal Write Mode
Signal Symbol
Parameter
RS
/CS
/WR
RD
DB[17:0]
DB[15:0]
DB[8:0]
DB[7:0]
tAST
tAHT
tCS
tRCS
tCSF
tWC
tWRH
tWRL
tRC
tRDH
tRDL
TWDS
TWDH
tRACC
tROD
Address setup time
Address
hold
time(Write/Read)
Chip select setup time
(Write)
Chip select setup time
(Read )
Chip
select
wait
time(Write/Read)
Write cycle
Control pulse “H” duration
Control pulse “L” duration
Read cycle
Control pulse “H” duration
Control pulse “L” duration
Data setup time
Data hold time
Read access time
Output disable time
Spec.
Min. Max.
10
10
-
Unit
ns
Description
-
20
20 - ns
20
-
100
30 - ns
-
25
450
250 - ns
170
15 -
For maximum
20
10
-
340
ns
CL=30pF
For minimum
10 CL=8pF
The information contained herein is the exclusive property of SHANGHAI TIANMA MICRO-ELECTRONICS
Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of SHANGHAI TIANMA MICRO-ELECTRONICS Corporation.
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12 Page | ||
Seiten | Gesamt 27 Seiten | |
PDF Download | [ TM035PDHV04 Schematic.PDF ] |
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