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ADM3485 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADM3485
Beschreibung (ADM3483 - ADM3491) RS-485/RS-422 Transceivers
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 20 Seiten
ADM3485 Datasheet, Funktion
Data Sheet
3.3 V Slew Rate Limited, Half- and
Full-Duplex, RS-485/RS-422 Transceivers
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
FEATURES
Operate with 3.3 V supply
Interoperable with 5 V logic
EIA RS-422 and RS-485 compliant over full
common-mode range
Data rate options
ADM3483/ADM3488: 250 kbps
ADM3485/ADM3490/ADM3491: 10 Mbps
Half- and full-duplex options
Reduced slew rates for low EMI (ADM3483 and ADM3488)
2 nA supply current in shutdown mode
(ADM3483/ADM3485/ADM3491)
Up to 32 transceivers on the bus
−7 V to +12 V bus common-mode range
Specified over the –40°C to +85°C temperature range
8 ns skew (ADM3485/ADM3490/ADM3491)
8-lead SOIC and 14-lead SOIC (ADM3491 only) packages
APPLICATIONS
Low power RS-485/RS-422 applications
Telecom
Industrial process control
HVAC
GENERAL DESCRIPTION
The ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 are
low power, differential line transceivers designed to operate using a
single 3.3 V power supply. Low power consumption, coupled with a
shutdown mode, makes the ADM3483/ADM3485/ADM3488/
ADM3490/ADM3491 ideal for power-sensitive applications.
The ADM3488/ADM3490/ADM3491 feature full-duplex com-
munication, while the ADM3483/ADM3485 are designed for
half-duplex communication.
The ADM3483/ADM3488 feature slew rate limited drivers that
minimize EMI and reduce reflections caused by improperly ter-
minated cables, allowing error-free data transmission at data rates
up to 250 kbps.
The ADM3485/ADM3490/ADM3491 transmit at up to 10 Mbps.
The receiver input impedance is 12 kΩ, allowing up to 32 trans-
ceivers to be connected on the bus. A thermal shutdown circuit
prevents excessive power dissipation caused by bus contention or
by output shorting. If a significant temperature increase is detected
FUNCTIONAL BLOCK DIAGRAMS
VCC
ADM3483/
ADM3485
RO R
RE
DE
DI D
A
B
GND
Figure 1.
VCC
RO R
A
ADM3488/
ADM3490
B
Z
DI D
Y
GND
Figure 2.
ADM3491
RO R
A
RE B
DE
DI D
Z
Y
Figure 3.
in the internal driver circuitry during fault conditions, then the
thermal shutdown circuit forces the driver output into a high
impedance state. If the inputs are unconnected (floating), the
receiver contains a fail-safe feature that results in a logic high
output state. The parts are fully specified over the commercial
and industrial temperature ranges. The ADM3483/ADM3485/
ADM3488/ADM3490 are available in 8-lead SOIC_N; the
ADM3491 is available in a 14-lead SOIC_N.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2005-2011 Analog Devices, Inc. All rights reserved.
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ADM3485 Datasheet, Funktion
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
Data Sheet
TIMING SPECIFICATIONS—ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
VCC = 3.3 V, TA = 25°C, unless otherwise noted.
Table 5.
Parameter
Min Typ Max Unit Test Conditions/Comments
RECEIVER
Time to Shutdown (tSHDN)
ADM3483/ADM3485/ADM34911
80 190 300 ns
Propagation Delay, Low-to-High Level (tRPLH)
ADM3485/ADM3490/ADM3491
25 65 90 ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 24 and Figure 30)
ADM3483/ADM3488
25 75 120 ns
Propagation Delay, High-to-Low Level (tRPHL)
ADM3485/ADM3490/ADM3491
25 65 90 ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 24 and Figure 30)
ADM3483/ADM3488
25 75 120 ns
|tPLH – tPHL| Propagation Delay Skew (tRPDS)
ADM3485/ADM3490/ADM3491
10 ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 24 and Figure 30)
ADM3483/ADM3488
20 ns
RECEIVER OUTPUT ENABLE/DISABLE TIMES
(ADM3483/ADM3485/ADM3491 ONLY)
Output Enable Time to Low Level (tPRZL)
25 50 ns CL = 15 pF (see Figure 25 and Figure 31)
Output Enable Time to High Level (tPRZH)
25 50 ns CL = 15 pF (see Figure 25 and Figure 31)
Output Disable Time from High Level (tPRHZ)
25 45 ns CL = 15 pF (see Figure 25 and Figure 31)
Output Disable Time from Low Level (tPRLZ)
25 45 ns CL = 15 pF (see Figure 25 and Figure 31)
Output Enable Time from Shutdown to
Low Level (tPRSL)
720 1400 ns
CL = 15 pF (see Figure 25 and Figure 31)
Output Enable Time from Shutdown to
High Level (tPRSH)
720 1400 ns
CL = 15 pF (see Figure 25 and Figure 31)
1 The transceivers are put into shutdown by bringing the RE high and DE low. If the inputs are in this state for less than 80 ns, the parts are guaranteed not to enter
shutdown. If the parts are in this state for 300 ns or more, the parts are guaranteed to enter shutdown.
Rev. E | Page 6 of 20
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ADM3485 pdf, datenblatt
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
Data Sheet
0V OR 3V
D
GENERATOR1
50
S1
CL = 50pF2
VCC
RL = 110
OUT
12PCPL RIN=C2L5U0DkEHSz,P5R0%OBDEUATNYDCYSCTRLEA,YtRCAP6A.0CnIsT,AZNOC=E.50.
Figure 23. Driver Enable and Disable Times (tPZL, tPSL, tPLZ)
+1.5V
–1.5V
S3
VID R
GENERATOR1
50
1k
CL2
S1
VCC
S2
12PCPL RIN=C2L5U0DkEHSz,P5R0%OBDEUATNYDCYSCTRLEA,YtRCAP6A.0CnIsT,AZNOC=E.50.
Figure 25. Receiver Enable and Disable Times
GENERATOR1
50
VID R
OUT
CL = 15pF2
1.5V
0
VOM
=
VCC
2
1PPR = 250kHz, 50% DUTY CYCLE, tR 6.0ns, ZO = 50.
2CL INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 24. Receiver Propagation Delays
Rev. E | Page 12 of 20
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