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PDF MAX19712 Data sheet ( Hoja de datos )

Número de pieza MAX19712
Descripción Analog Front-End
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo




1. MAX19712






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19-0528; Rev 0; 5/06
EVAALVUAAILTAIOBNLEKIT
10-Bit, 22Msps, Full-Duplex
Analog Front-End
General Description
Features
The MAX19712 is an ultra-low-power, highly integrated
mixed-signal analog front-end (AFE) ideal for wideband
communication applications operating in full-duplex
(FD) mode. Optimized for high dynamic performance
and ultra-low power, the device integrates a dual 10-bit,
22Msps receive (Rx) ADC; dual 10-bit, 22Msps transmit
(Tx) DAC; three fast-settling 12-bit aux-DAC channels
for ancillary RF front-end control; and a 10-bit, 333ksps
housekeeping aux-ADC. The typical operating power in
FD mode is 50.4mW at a 22MHz clock frequency.
The Rx ADCs feature 54.7dB SINAD and 75.6dBc SFDR
at 5.5MHz input frequency with a 22MHz clock frequen-
cy. The analog I/Q input amplifiers are fully differential
and accept 1.024VP-P full-scale signals. Typical I/Q
channel matching is ±0.01° phase and ±0.01dB gain.
The Tx DACs feature 72.9dBc SFDR at fOUT = 2.2MHz
and fCLK = 22MHz. The analog I-Q full-scale output volt-
age range is ±400mV differential. The output DC com-
mon-mode voltage is from 0.89V to 1.36V. The I/Q
channel offset is adjustable to optimize radio lineup side-
band/carrier suppression. Typical I-Q channel matching
is ±0.01dB gain and ±0.1° phase.
Two independent 10-bit parallel, high-speed digital
buses used by the Rx ADC and Tx DAC allow full-
duplex operation for frequency-division duplex applica-
tions. The Rx ADC and Tx DAC can be disabled
independently to optimize power management. A 3-wire
serial interface controls power-management modes, the
aux-DAC channels, and the aux-ADC channels.
Dual 10-Bit, 22Msps Rx ADC and Dual 10-Bit,
22Msps Tx DAC
Ultra-Low Power
50.4mW at fCLK = 22MHz, FD Mode
39.9mW at fCLK = 22MHz, Slow Rx Mode
33.9mW at fCLK = 22MHz, Slow Tx Mode
Low-Current Standby and Shutdown Modes
Programmable Tx DAC Common-Mode DC Level
and I/Q Offset Trim
Excellent Dynamic Performance
SNR = 54.8dB at fIN = 5.5MHz (Rx ADC)
SFDR = 72.9dBc at fOUT = 2.2MHz (Tx DAC)
Three 12-Bit, 1μs Aux-DACs
10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and
Data Averaging
Excellent Gain/Phase Match
±0.01° Phase, ±0.01dB Gain (Rx ADC) at
fIN = 5.5MHz
Multiplexed Parallel Digital I/O
Serial-Interface Control
Versatile Power-Control Circuits
Shutdown, Standby, Idle, Tx/Rx Disable
Miniature 56-Pin Thin QFN Package
(7mm x 7mm x 0.8mm)
TOP VIEW
Pin Configuration
The MAX19712 operates on a single 2.7V to 3.3V analog
supply and 1.8V to 3.3V digital I/O supply. The
MAX19712 is specified for the extended (-40°C to
+85°C) temperature range and is available in a 56-pin,
thin QFN package. The Selector Guide at the end of the
data sheet lists other pin-compatible versions in this AFE
family. For time-division duplex (TDD) applications, refer
to the MAX19705–MAX19708 AFE family of products.
Applications
WCDMA Handsets
801.11a/b/g WLAN
RFID Readers
VoIP Terminals
Portable Communication
Equipment
Ordering Information
PART*
PIN-PACKAGE
PKG CODE
42 41 40 39 38 37 36 35 34 33 32 31 30 29
ADC1 43
DAC3 44
DAC2 45
DAC1 46
VDD 47
IDN 48
IDP 49
GND 50
VDD 51
QDN 52
QDP 53
REFIN 54
COM 55
REFN 56
MAX19712
EXPOSED PADDLE (GND)
28 DA3
27 DA2
26 DA1
25 DA0
24 OVDD
23 OGND
22 AD9
21 AD8
20 AD7
19 AD6
18 AD5
17 AD4
16 AD3
15 AD2
1 2 3 4 5 6 7 8 9 10 11 12 13 14
MAX19712ETN
MAX19712ETN+
56 Thin QFN-EP**
56 Thin QFN-EP**
T5677-1
T5677-1
THIN QFN
NOTE: THE PIN 1 INDICATOR IS “+” FOR LEAD-FREE DEVICES.
*All devices are specified over the -40°C to +85°C operating range.
**EP = Exposed paddle. +Denotes lead-free package.
Functional Diagram and Selector Guide appear at end of
data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
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1 page




MAX19712 pdf
10-Bit, 22Msps, Full-Duplex
Analog Front-End
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL 10pF on all digital outputs, fCLK = 22MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx DAC output,
CREFP = CREFN = CCOM = 0.33µF, CL < 5pF on all aux-DAC outputs, TA = TMIN to TMAX, unless otherwise noted. Typical values are
at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
Tx DAC DC ACCURACY
Resolution
Integral Nonlinearity
N
INL
Differential Nonlinearity
DNL
Residual DC Offset
Full-Scale Gain Error
VOS
Tx DAC DYNAMIC PERFORMANCE
DAC Conversion Rate
In-Band Noise Density
fCLK
ND
Third-Order Intermodulation
Distortion
IM3
Glitch Impulse
Spurious-Free Dynamic Range to
Nyquist
SFDR
CONDITIONS
Guaranteed monotonic (Note 6)
(Note 2)
fOUT = 2.2MHz
fOUT1 = 2MHz, fOUT2 = 2.2MHz
fOUT = 2.2MHz
MIN TYP MAX UNITS
10
-0.75
-4
-40
±0.3
±0.2
±0.03
±0.8
+0.75
+4
+40
Bits
LSB
LSB
mV
mV
-129
22 MHz
dBFS/Hz
-70 dBc
10 pVs
61 72.9
dBc
Total Harmonic Distortion to
Nyquist
THD
Signal-to-Noise Ratio to Nyquist
SNR
Tx DAC INTERCHANNEL CHARACTERISTICS
I-to-Q Output Isolation
Gain Mismatch Between I and Q
Channels
fOUT = 2.2MHz
fOUT = 2.2MHz
fOUTX,Y = 2MHz, fOUTY,X = 2.2MHz
Measured at DC
-71 -60.5
59.3
dBc
dB
88
-0.4 ±0.01 +0.4
dB
dB
Phase Mismatch Between I and Q
Channels
fOUT = 2.2MHz
Differential Output Impedance
Tx DAC ANALOG OUTPUT
Full-Scale Output Voltage
VFS
Bits CM1 = 0, CM0 = 0 (default)
Output Common-Mode Voltage
VCOMD
Bits CM1 = 0, CM0 = 1
Bits CM1 = 1, CM0 = 0
Bits CM1 = 1, CM0 = 1
Rx ADC–Tx DAC INTERCHANNEL CHARACTERISTICS
Receive Transmit Isolation
AUXILIARY ADCs (ADC1, ADC2)
Resolution
ADC fINI = fINQ = 5.5MHz, DAC fOUTI =
fOUTQ = 2.2MHz
N
Full-Scale Reference
VREF
AD1 = 0 (default)
AD1 = 1
±0.1
800
Degrees
Ω
1.29
1.14
0.96
0.78
±400
1.36
1.2
1.05
0.89
1.42
1.27
1.15
1.03
mV
V
85
10
2.048
VDD
dB
Bits
V
_______________________________________________________________________________________ 5
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5 Page





MAX19712 arduino
10-Bit, 22Msps, Full-Duplex
Analog Front-End
Typical Operating Characteristics (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL 10pF on all digital outputs, fCLK = 22MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx DAC output,
CREFP = CREFN = CCOM = 0.33µF, TA = +25°C, unless otherwise noted.)
Rx ADC SIGNAL-TO-NOISE AND DISTORTION
RATIO vs. ANALOG INPUT AMPLITUDE
60
fIN = 5.4489746MHz
55
QA
50
45
40 IA
35
30
25
20
-30
-25 -20 -15 -10 -5
ANALOG INPUT AMPLITUDE (dBFS)
0
Rx ADC SIGNAL-TO-NOISE RATIO
vs. SAMPLING FREQUENCY
57.0
56.5 fIN = 5.4489746MHz
56.0
QA
55.5
55.0
54.5
54.0 IA
53.5
53.0
52.5
52.0
0 2 4 6 8 10 12 14 16 18 20 22
SAMPLING FREQUENCY (MHz)
Rx ADC SPURIOUS-FREE DYNAMIC RANGE
vs. SAMPLING FREQUENCY
90
fIN = 5.4489746MHz
85
80 QA
75
70 IA
65
60
55
0 2 4 6 8 10 12 14 16 18 20 22
SAMPLING FREQUENCY (MHz)
Rx ADC TOTAL HARMONIC DISTORTION
vs. ANALOG INPUT AMPLITUDE
80
75 fIN = 5.4489746MHz
70
65
QA
60
55
50
45 IA
40
35
30
-30
-25 -20 -15 -10 -5
ANALOG INPUT AMPLITUDE (dBFS)
0
Rx ADC SIGNAL-TO-NOISE AND DISTORTION
RATIO vs. SAMPLING FREQUENCY
57.0
56.5 fIN = 5.4489746MHz
56.0
QA
55.5
55.0
54.5
IA
54.0
53.5
53.0
52.5
52.0
0 2 4 6 8 10 12 14 16 18 20 22
SAMPLING FREQUENCY (MHz)
Rx ADC SIGNAL-TO-NOISE RATIO
vs. CLOCK DUTY CYCLE
58
57 fIN = 5.468363MHz
56 QA
55
54
53 IA
52
51
50
49
48
35
40 45 50 55 60
CLOCK DUTY CYCLE (%)
65
Rx ADC SPURIOUS-FREE DYNAMIC RANGE
vs. ANALOG INPUT AMPLITUDE
85
80 fIN = 5.4489746MHz
75
70
65
60
55 QA
50 IA
45
40
35
30
-30 -25 -20 -15 -10
-5
0
ANALOG INPUT AMPLITUDE (dBFS)
Rx ADC TOTAL HARMONIC DISTORTION
vs. SAMPLING RATE
85
fIN = 5.4489746MHz
80
IA
75
70
QA
65
60
55
0 2 4 6 8 10 12 14 16 18 20 22
SAMPLING FREQUENCY (MHz)
Rx ADC SIGNAL-TO-NOISE AND DISTORTION
RATIO vs. CLOCK DUTY CYCLE
58
57 fIN = 5.468363MHz
56 QA
55
54
53 IA
52
51
50
49
48
35
40 45 50 55 60
CLOCK DUTY CYCLE (%)
65
______________________________________________________________________________________ 11
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