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PDF RT7297B Data sheet ( Hoja de datos )
| Número de pieza | RT7297B | |
| Descripción | Synchronous Step-Down Converter | |
| Fabricantes | Richtek | |
| Logotipo |  |
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®
RT7297B
3A, 18V, 1.2MHz Synchronous Step-Down Converter
General Description
The RT7297B is a high efficiency, monolithic synchronous
step-down DC/DC converter that can deliver up to 3A
output current from a 4.5V to 18V input supply. The
RT7297B's current mode architecture and external
compensation allow the transient response to be
optimized over a wide input voltage range and loads. Cycle-
by-cycle current limit provides protection against shorted
outputs, and soft-start eliminates input current surge during
start-up. The RT7297B also provides under voltage
protection and thermal shutdown protection. The low
current (<3μA) shutdown mode provides output
disconnection, enabling easy power management in
battery-powered systems. The RT7297B is available in
an SOP-8 (Exposed Pad) package.
Ordering Information
RT7297B
Package Type
SP : SOP-8 (Exposed Pad-Option 1)
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
H : UVP Hiccup
L : UVP Latch-Off
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
RT7297BxZSP : Product Number
RT7297Bx
ZSPYMDNN
x : H or L
YMDNN : Date Code
Features
±1.5% High Accuracy Reference Voltage
4.5V to 18V Input Voltage Range
3A Output Current
Integrated N-MOSFET Switches
Current Mode Control
Fixed Frequency Operation : 1.2MHz
Output Adjustable from 0.8V to 12V
Up to 95% Efficiency
Programmable Soft-Start
Stable with Low ESR Ceramic Output Capacitors
Cycle-by-Cycle Over Current Protection
Input Under Voltage Lockout
Output Under Voltage Protection
Thermal Shutdown Protection
RoHS Compliant and Halogen Free
Applications
Wireless AP/Router
Set-Top-Box
Industrial and Commercial Low Power Systems
LCD Monitors and TVs
Green Electronics/Appliances
Point of Load Regulation of High-Performance DSPs
Pin Configurations
(TOP VIEW)
BOOT
VIN
SW
GND
8
27
GND
36
9
45
SS
EN
COMP
FB
SOP-8 (Exposed Pad)
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
DS7297B-02 September 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
Free Datasheet http://www.datasheet4u.com/
1 page  
RT7297B
Parameter
EN Input Threshold Logic-High
Voltage
Logic-Low
Input Under Voltage Lockout
Threshold
Input Under Voltage Lockout
Hysteresis
Soft-Start Current
Soft-Start Period
Thermal Shutdown
Symbol
VIH
VIL
VUVLO
ΔVUVLO
ISS
tSS
TSD
Test Conditions
VIN Rising
VSS = 0V
CSS = 0.1μF
Min Typ Max Unit
2.7 -- 18
V
-- -- 0.4
3.8 4.2 4.5
V
-- 320 --
-- 6 --
-- 13.5 --
-- 150 --
mV
μA
ms
°C
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
DS7297B-02 September 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
RT7297B
CIN and COUT Selection
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the high side MOSFET.
To prevent large ripple current, a low ESR input capacitor
sized for the maximum RMS current should be used. The
approximate RMS current is given :
IRMS
=
IOUT(MAX)
VOUT
VIN
VIN
VOUT
−1
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT / 2. This simple worst case condition is
commonly used for design because even significant
deviations do not offer much relief. Choose a capacitor
rated at a higher temperature than required. Several
capacitors may also be paralleled to meet size or height
requirements in the design. For the input capacitor, two
10μF low ESR ceramic capacitors are suggested. For the
suggested
capacitor, please refer to Table 3 for more details. The
selection of COUT is determined by the required ESR to
minimize voltage ripple. Moreover, the amount of bulk
capacitance is also a key for COUT selection to ensure
that the control loop is stable. Loop stability can be
checked by viewing the load transient response as
described in a later section.
The output ripple, ΔVOUT, is determined by :
ΔVOUT
≤
ΔIL
⎡⎢⎣ESR +
1
8fCOUT
⎤
⎥⎦
The output ripple will be the highest at the maximum input
voltage since ΔIL increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement. Higher values,
lower cost ceramic capacitors are now becoming available
in smaller case sizes. Their high ripple current, high voltage
rating and low ESR make them ideal for switching regulator
applications. However, care must be taken when these
capacitors are used at input and output. When a ceramic
capacitor is used at the input and the power is supplied
by a wall adapter through long wires, a load step at the
output can induce ringing at the input, VIN. At best, this
ringing can couple to the output and be mistaken as loop
instability. At worst, a sudden inrush of current through
the long wires can potentially cause a voltage spike at
VIN large enough to damage the part.
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
DS7297B-02 September 2012
Thermal Considerations
For continuous operation, do not exceed the maximum
operation junction temperature 125°C. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = (TJ(MAX) − TA ) / θJA
Where TJ(MAX) is the maximum operation junction
temperature , TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT7297B, the maximum junction temperature is 125°C.
The junction to ambient thermal resistance θJA is layout
dependent. For SOP-8 (Exposed Pad) package, the
thermal resistance θJA is 75°C/W on the standard JEDEC
51-7 four-layers thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by following
formula :
PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W
(min.copper area PCB layout)
PD(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W
(70mm2copper area PCB layout)
The thermal resistance θJA of SOP-8 (Exposed Pad) is
determined by the package architecture design and the
PCB layout design. However, the package architecture
design had been designed. If possible, it's useful to
increase thermal performance by the PCB layout copper
design. The thermal resistance θJA can be decreased by
adding copper area under the exposed pad of SOP-8
(Exposed Pad) package.
As shown in Figure 7, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard
SOP-8 (Exposed Pad) pad (Figure 7.a), θJA is 75°C/W.
Adding copper area of pad under the SOP-8 (Exposed
Pad) (Figure 7.b) reduces the θJA to 64°C/W. Even further,
increasing the copper area of pad to 70mm2 (Figure 7.e)
reduces the θJA to 49°C/W.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet RT7297B.PDF ] | |
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