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92HD87 Schematic ( PDF Datasheet ) - IDT

Teilenummer 92HD87
Beschreibung SINGLE CHIP PC AUDIO SYSTEM
Hersteller IDT
Logo IDT Logo 




Gesamt 70 Seiten
92HD87 Datasheet, Funktion
DATASHEET
SINGLE CHIP PC AUDIO SYSTEM
CODEC+ STEREO SPEAKER AMPLIFIER+CAPLESS HP+LDO
92HD87
Description
Features
The 92HD87 single-chip audio system is a low power
optimized, high fidelity, 4-channel audio codec with
integrated speaker amplifier, capless headphone amplifier,
and low drop out voltage regulator.
The high integration of the 92HD87 and the 40QFN
package enables the smallest PCB footprint with the lowest
system BOM count and cost.
• 4 Channels (2 stereo DACs and 2 stereo ADCs) with
24-bit resolution
• Supports full-duplex stereo audio and simultaneous VoIP
• 2W/channel stereo speaker amplifier @ 4 ohms and
4.75V
• Two headphone amplifiers
• One capless and one non-capless retaskable
The 92HD87 provides high quality HD Audio capability to
notebook and business desktop PC applications.
• Internal LDO for digital core supply
• +5 V analog power supply option
• Dedicated BTL high pass filter for speaker
protection (RA revision only)
• Full HDA015-B low power support
• Audio inactivity transitions codec from D0 to D3 low
power mode
• Resume from D3 to D0 with audio activity in < 10 msec
• D3 to D0 transition with < -65dB pop/click
• Port presence detect in D3 with or without bit clock
• Optional analog PC beep in D3
• Additional vendor specific modes for even lower power
• Microsoft WLP premium logo compliant, as defined
http://www.DataSheet4U.net/
in WLP 3.9
• Support for 1.5V and 3.3V HDA signaling
• Digital microphone inputs (mono or stereo)
• Aux Audio Mode (see orderable part numbers for support)
• High performance analog mixer
• 2 adjustable VREF Out pins for analog microphone
bias
• 5 analog ports with port presence detect + stereo
speaker differential output)
• Analog and digital PC Beep support
• 40-pad QFN RoHS package
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
1
V 0.995 01/11
92HD87
datasheet pdf - http://www.DataSheet4U.net/






92HD87 Datasheet, Funktion
92HD87
SINGLE CHIP PC AUDIO SYSTEM, CODEC+STEREO SPEAKER AMPLIFIER+CAPLESS HP+LDO
8.14.1. DAC1 (NID = 14h): Cnvtr ...............................................................................................142
8.14.2. DAC1 (NID = 14h): ProcState (RA revision only) ...........................................................143
8.14.3. DAC1 (NID = 14h): OutAmpLeft .....................................................................................144
8.14.4. DAC1 (NID = 14h): OutAmpRight ..................................................................................144
8.14.5. DAC1 (NID = 14h): PwrState .........................................................................................144
8.14.6. DAC1 (NID = 14h): CnvtrID ............................................................................................145
8.14.7. DAC1 (NID = 14h): EAPDBTLLR ...................................................................................146
8.14.8. DAC1 (NID = 14h): ProcIndex (RA revision only) ..........................................................146
8.15. DAC2 (NID = 22h): WCap ............................................................................................................147
8.15.1. DAC2 (NID = 22h): Cnvtr ...............................................................................................149
8.15.2. DAC2 (NID = 22h): OutAmpLeft .....................................................................................150
8.15.3. DAC2 (NID = 22h): OutAmpRight ..................................................................................150
8.15.4. DAC2 (NID = 22h): PwrState .........................................................................................151
8.15.5. DAC2 (NID = 22h): CnvtrID ............................................................................................152
8.15.6. DAC2 (NID = 22h): EAPDBTLLR ...................................................................................152
8.16. ADC0 (NID = 15h): WCap ............................................................................................................153
8.16.1. ADC0 (NID = 15h): ConLst ............................................................................................154
8.16.2. ADC0 (NID = 15h): ConLstEntry0 ..................................................................................155
8.16.3. ADC0 (NID = 15h): Cnvtr ...............................................................................................155
8.16.4. ADC0 (NID = 15h): ProcState ........................................................................................156
8.16.5. ADC0 (NID = 15h): PwrState .........................................................................................157
8.16.6. ADC0 (NID = 15h): CnvtrID ............................................................................................158
8.17. ADC1 (NID = 16h): WCap ............................................................................................................158
8.17.1. ADC1 (NID = 16h): ConLst ............................................................................................160
8.17.2. ADC1 (NID = 16h): ConLstEntry0 ..................................................................................160
8.17.3. ADC1 (NID = 16h): Cnvtr ...............................................................................................161
8.17.4. ADC1 (NID = 16h): ProcState ........................................................................................162
8.17.5. ADC1 (NID = 16h): PwrState .........................................................................................163
8.17.6. ADC1 (NID = 16h): CnvtrID ............................................................................................164
8.18. ADC0Mux (NID = 17h): WCap .....................................................................................................164
8.18.1. ADC0Mux (NID = 17h): ConLst ................http.://ww.w.Da.taShe.et4U..net/................................................................. 166
8.18.2. ADC0Mux (NID = 17h): ConLstEntry4 ...........................................................................166
8.18.3. ADC0Mux (NID = 17h): ConLstEntry0 ...........................................................................167
8.18.4. ADC0Mux (NID = 17h): OutAmpCap .............................................................................167
8.18.5. ADC0Mux (NID = 17h): OutAmpLeft ..............................................................................168
8.18.6. ADC0Mux (NID = 17h): OutAmpRight ...........................................................................168
8.18.7. ADC0Mux (NID = 17h): ConSelectCtrl ...........................................................................169
8.18.8. ADC0Mux (NID = 17h): PwrState ..................................................................................169
8.18.9. ADC0Mux (NID = 17h): EAPDBTLLR ............................................................................170
8.19. ADC1Mux (NID = 18h): WCap .....................................................................................................171
8.19.1. ADC1Mux (NID = 18h): ConLst ......................................................................................172
8.19.2. ADC1Mux (NID = 18h): ConLstEntry4 ...........................................................................173
8.19.3. ADC1Mux (NID = 18h): ConLstEntry0 ...........................................................................173
8.19.4. ADC1Mux (NID = 18h): OutAmpCap .............................................................................174
8.19.5. ADC1Mux (NID = 18h): OutAmpLeft ..............................................................................175
8.19.6. ADC1Mux (NID = 18h): OutAmpRight ...........................................................................175
8.19.7. ADC1Mux (NID = 18h): ConSelectCtrl ...........................................................................176
8.19.8. ADC1Mux (NID = 18h): PwrState ..................................................................................176
8.19.9. ADC1Mux (NID = 18h): EAPDBTLLR ............................................................................177
8.20. Reserved (NID = 19h) ..................................................................................................................177
8.21. Reserved (NID = 1Ah) .................................................................................................................177
8.22. Mixer (NID = 1Bh): WCap ............................................................................................................177
8.22.1. Mixer (NID = 1Bh): InAmpCap .......................................................................................179
8.22.2. Mixer (NID = 1Bh): ConLst .............................................................................................180
8.22.3. Mixer (NID = 1Bh): ConLstEntry4 ..................................................................................180
8.22.4. Mixer (NID = 1Bh): ConLstEntry0 ..................................................................................181
8.22.5. Mixer (NID = 1Bh): InAmpLeft0 ......................................................................................181
8.22.6. Mixer (NID = 1Bh): InAmpRight0 ...................................................................................182
8.22.7. Mixer (NID = 1Bh): InAmpLeft1 ......................................................................................183
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
6
V 0.995 01/11
92HD87
datasheet pdf - http://www.DataSheet4U.net/

6 Page









92HD87 pdf, datenblatt
92HD87
SINGLE CHIP PC AUDIO SYSTEM, CODEC+STEREO SPEAKER AMPLIFIER+CAPLESS HP+LDO
Output ports are always on to prevent pops/clicks associated with charging and discharging output
coupling capacitors. This maintains proper bias on output coupling caps even in power state D3 as
long as AVDD is available. Unused ports should be left unconnected. When updating existing
designs to use the codec, ensure that there are no conflicts between the output ports on the codec
and existing circuitry.
AFG Power State
D0-D2
D3
D3cold
D4
D5
Input Enable
1
1
0
0
-
-
-
-
-
Output Enable
1
0
1
0
0
1
-
-
-
Port Behavior
Not allowed. Port is active as output. Input path is mute.
Active - Port enabled as input
Active - Port enabled as output
Inactive -port is powered on (low output impedance) but drives silence only.
Inactive (lower power) - Port keeps output coupling caps charged if port uses caps.
Low power state. If enabled, Beep will output from the port
Inactive (lower power) - Port keeps output coupling caps charged if port uses caps.
Inactive (lower power) - Port keeps output coupling caps charged if port uses caps.
Off - Charge on coupling caps (if used) will not be maintained.
Table 2. Analog Output Port Behavior
2.1.2.
Vref_Out
Ports C & A support Vref_Out pins for biasing electret cartridge microphones. Settings of 80%
AVDD, 50% AVDD, GND, and Hi-Z are supported. Attempting to program a pin widget control with a
reserved or unsupported value will cause the associated Vref_Out pin to assume a Hi-Z state and
the pin widget control Vref_En field will return a value of ‘000’ (Hi-Z) when read.
2.1.3.
Jack Detect
http://www.DataSheet4U.net/
Plugs inserted to a jack on Ports A, B, C are detected using SENSE_A. Plugs inserted to a jack on
Ports F, DMIC0, are detected using SENSE_B. Per HDA015-B, the detection circuit operates when
the CODEC is in D0 - D3 and can also operate if both the CODEC and Controller are in D3 (no bus
clock.) Jack detection requires that all supplies (analog and digital) are active and stable. When
AVDD is not present, the value reported in the pin widget is invalid.
When the HD Audio bus is in a low power state (reset asserted and clock stopped) the CODEC will
generate a Power State Change Request when a change in port connectivity is sensed and then
generate an unsolicited response after the HD Audio link has been brought out of a low power state
and the device has been enumerated. Per HDA015-B, this will take less than 10mS.
The following table summarizes the proper resistor tolerances for different analog supply voltages.
AVdd Nominal
Voltage (+/- 5%)
4.75V
Resistor Tolerance
Pull-Up
1%
Resistor Tolerance
SENSE_A/B
1%
Resistor
39.2K
20.0K
10.0K
5.11K
2.49K
SENSE_A
PORT A (HP0)
PORT B (HP1)
PORT C
SENSE_B
NA
PORT F
DMIC0
Pull-up to AVDD Pull-up to AVDD
See reference design for more information on Jack Detect implementation.
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
12
V 0.995 01/11
92HD87
datasheet pdf - http://www.DataSheet4U.net/

12 Page





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