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JS28F00AM29EWLx Schematic ( PDF Datasheet ) - Numonyx

Teilenummer JS28F00AM29EWLx
Beschreibung 3 V supply flash memory
Hersteller Numonyx
Logo Numonyx Logo 




Gesamt 30 Seiten
JS28F00AM29EWLx Datasheet, Funktion
Numonyx™ Axcell™ M29EW
Datasheet
256-Mbit, 512-Mbit, 1-Gbit, 2-Gbit (x8/x16, uniform block)
3 V supply flash memory
Features
„ Supply voltage
— VCC = 2.7 to 3.6 V for Program, Erase and
Read
— VCCQ = 1.65 to 3.6 V for I/O buffers
„ Asynchronous Random/Page Read
— Page size: 16 words or 32 bytes
— Page access: 25 ns
— Random access: 100ns (Fortified BGA);
110 ns (TSOP)
„ Buffer Program
— 512-word program buffer
„ Programming time
— 0.88 µs per byte (1.14MB/s) typical when
using full buffer size in buffer program
„ Memory organization
— Uniform blocks, 128 Kbytes/64 Kwords
each
„ Program/Erase controller
— Embedded byte/word program algorithms
„ Program/ Erase Suspend and Resume
— Read from any block during Program
Suspend
— Read and Program another block during
Erase Suspend
„ Blank Check to verify an erased block
„ Unlock Bypass/Block Erase/Chip Erase/Write
to Buffer
— Faster Buffered/Batch Programming
— Faster Block and Chip Erase
„ Vpp/WP# pin protection
— Protects first or last block regardless of
block protection settings
„ Software protection
— Volatile Protection
— Non-Volatile Protection
— Password Protection
— Password Access
„ Extended Memory block
— 128-word/256-byte block for permanent,
secure identification.
— can be programmed and locked by factory
http://www.DataSheet4U.net/
or by the customer
„ Low power consumption
— Standby
„ Minimum 100,000 Program/Erase cycles per
block
„ ETOXTM* X (65nm) MLC technology
„ Fortified BGA and TSOP packages
„ JESD47E Compliant
„ Green packages available
— RoHS Compliant
— Halogen Free
April 2011
208045-11
1
datasheet pdf - http://www.DataSheet4U.net/






JS28F00AM29EWLx Datasheet, Funktion
List of Figures
Numonyx™ Axcell™ M29EW
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2-Gbit (1-Gbit/1-Gbit stack) configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
TSOP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Fortified BGA connections (top and bottom views). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Block addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Software protection scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Boundary condition of program buffer size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Write to Buffer Program fletcher and pseudo code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
NVPB Program/Erase algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Lock Register program flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Data polling flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Toggle flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Status Register Polling Flow Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
AC measurement load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Power-up wait timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Random Read AC waveforms (8-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Random Read AC waveforms (16-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
BYTE# Transition AC Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Page Read AC waveforms (16-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Write Enable Controlled Program waveforms (8-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . 67
Write Enable Controlled Program waveforms (16-bit mode) . . . . . . . . . . . . . . . . . . . . . . . 69
Chip Enable Controlled Program waveforms (8-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . . 71
Chip Enable Controlled Program waveforms (16-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . 72
Chip/Block Erase waveforms (8-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Reset AC waveforms (no program/erase in progress) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Reset during program/erase operation AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Accelerated program timing waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Data polling AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
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Toggle/Alternative Toggle bit polling AC waveforms (8-bit mode) . . . . . . . . . . . . . . . . . . . 76
TSOP56 – 56 lead thin small-outline package, 14 x 20 mm, package outline . . . . . . . . . . 78
Fortified BGA64 11 x 13 mm - 8 x 8 active ball array, package outline . . . . . . . . . . . . . . . 79
6 208045-11
datasheet pdf - http://www.DataSheet4U.net/

6 Page









JS28F00AM29EWLx pdf, datenblatt
Description
Figure 5. Block addresses
A[26:-1] 2-Gbit
A[25:-1] 1-Gbit
A[24:-1] 512-Mbit
A[23:-1] 256-Mbit
FFFFFFFh
FFE0000 h
128-KB Array Block 2047
Numonyx™ Axcell™ M29EW
A[26:0] 2-Gbit
A[25:0] 1-Gbit
A[24:0] 512-Mbit
A[23:0] 256-Mbit
7FFFFFFh
7FF0000 h
64-KW Array Block 2047
7FFFFFFh
7FE0000 h
128-KB Array Block 1023
3FFFFFFh
3FF0000 h
64-KW Array Block 1023
3FFFFFFh
3FE0000 h
128-KB Array Block 511
1FFFFFFh
1FF0000 h
64-KW Array Block 511
1FFFFFFh
1FE0000 h
128-KB Array Block 255
0FFFFFFh
0FF0000 h
64-KW Array Block 255
003 FFFFh
0020000 h
001 FFFFh
0000000 h
128-KB Array Block 1
128-KB Array Block 0
001FFFFh
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0010000 h
000FFFFh
0000000 h
64-KW Array Block
64-KW Array Block
1
0
12 208045-11
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12 Page





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