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PDF HT47C10L Data sheet ( Hoja de datos )
| Número de pieza | HT47C10L | |
| Descripción | R-F Type Low Voltage 8-Bit Mask MCU | |
| Fabricantes | Holtek Semiconductor | |
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HT47C10L
R-F Type Low Voltage 8-Bit Mask MCU
Technical Document
· Tools Information
· FAQs
· Application Note
- HA0029E Using the Time Base Function in the HT47R20A-1
- HA0030E Using the RTC in the HT47R20A-1
- HA0034E Using the Buzzer Function in the HT47R20A-1
- HA0036E Using the PFD Function in the HT47R20A-1
- HA0045E Distinguishing between the Different Devices in the HT47 MCU Series
Features
· Operating voltage: 1.2V~2.2V
· Eight bidirectional I/O lines
· On-chip 32kHz/128kHz built-in RC oscillator
(Mask option; 128kHz is selected especially for EL
driving)
· Watchdog Timer
· 1K´16 program memory ROM
· 32´8 data memory RAM
· One time base (TB)
· One buzzer output
· One EL output
· One externally adjustable low voltage detector
· HALT function and wake-up feature reduce power
consumption
· One LCD driver with 9´4 segments, 1/4 duty, 1/2 bias
· RC type A/D converter
· Two-level subroutine nesting
· Bit manipulation instruction
· 16-bit table read instruction
· Up to 122ms instruction cycle with 32768Hz system
clock
· All instructions in one or two machine cycles
· 63 powerful instructions
· 44-pin QFP package
General Description
The HT47C10L is an 8-bit high performance RISC-like
microcontroller. Its single cycle instruction and
two-stage pipeline architecture make it suitable for high
www.DataSheet.net/
speed applications. The device is suited for clinical ther-
mometers.
Rev. 1.90
1 November 30, 2005
Datasheet pdf - http://www.DataSheet4U.co.kr/
1 page  
A.C. Characteristics
Symbol
Parameter
Test Conditions
VDD Conditions
f32K Oscillator Clock (32kHz option) 1.5V
¾
f128K
Oscillator Clock (128kHz option) 1.5V
¾
tRES External Reset Low Pulse Width 1.5V
¾
fAD A/D Converter Frequency
1.5V
¾
HT47C10L
Min.
26
102
100
¾
Typ.
32
128
¾
¾
Ta=25°C
Max. Unit
40 kHz
160 kHz
¾ ms
50 kHz
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Rev. 1.90
5 November 30, 2005
Datasheet pdf - http://www.DataSheet4U.co.kr/
5 Page 
HT47C10L
Time Base - TB
The time base is used to supply a regular internal inter-
rupt. Its time-out period ranges from fS/28 to fS/215 by
software programming. Writing data to RT2, RT1 and
RT0 (bits 2, 1, 0 of TBC;09H) yields various time-out
periods. If a time base time-out occurs, the related inter-
rupt request flag (TBF; bit 5 of INTC) is set. But if the in-
terrupt is enabled, and the stack is not full, a subroutine
call to location 08H occurs. When the ²HALT² instruction
is executed, the time base still works and can wake-up
from HALT mode if fOSC is on. If the TBF is set 1 before
entering the HALT mode, the wake-up function will be
disabled.
RT2 RT1 RT0
000
001
010
011
100
101
110
111
Time Base
Divided Factor
28
29
210
211
212
213
214
215
Power Down Operation - HALT
The HALT mode is initialized by the ²HALT² instruction
and results in the following.
· The fOSC and fSYS will still work or stop depend on
STANDBY option (Option register bit 5), but T1 will
turn off.
· The contents of the on-chip RAM and registers remain
unchanged.
· The WDT will be cleared and recount again.
· All I/O ports maintain their original status.
· The PDF flag is set and the TO flag is cleared.
· LCD driver can be off or on depend on STANDBY op-
tion (Option register bit 5)
· The time base will stop or run depends on STANDBY
option (Option register bit 5).
The port A wake-up and interrupt methods can be con-
sidered as a continuation of normal execution. Awaken-
ing from an I/O port stimulus, the program will resume
execution of the next instruction. If awakening from an
interrupt, two sequences may happen. If the related in-
terrupt is disabled or the interrupt is enabled but the
stack is full, the program will resume execution at the
next instruction. If the interrupt is enabled and the stack
is not full, a regular interrupt response takes place.
If an interrupt request flag is set to ²1² before entering
the HALT mode the wake-up function of the related in-
terrupt will be disabled.
If the wake-up results from an interrupt acknowledg-
ment, the actual interrupt subroutine execution will be
delayed by more than one cycle. However, if the
wake-up results in the next instruction execution, the ex-
ecution will be performed immediately.
To minimize power consumption, all the I/O pins should
be carefully managed before entering the HALT mode.
Reset
There are three ways in which a reset may occur.
· RES reset during normal operation
· RES reset during HALT mode
· WDT time-out reset during normal operation
The WDT time-out during HALT mode is different from
other chip reset conditions, since it can perform a warm
reset that just resets the Program Counter and SP leav-
ing the other circuits in their original state. Some regis-
ters remain unchanged during other reset conditions.
Most registers are reset to the ²initial condition² when
the reset conditions are met. By examining the PDF and
TO flags, the program can distinguish between different
²chip resets².
TO PDF
RESET Conditions
0
u
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0
1
1
0 System power-up
u
RES reset or LVR reset during normal
operation
1
RES reset or LVR reset wake-up from
HALT mode
u WDT time-out during normal operation
1 WDT wake-up from HALT mode
Note: ²u² means ²unchanged²
The chip-reset status of the functional units are shown be-
low.
Program Counter
Interrupt
Prescaler, Divider
WDT, Time Base
Timer/event Counter
Input/output Ports
Stack Pointer
000H
Disabled
Cleared
Clear. After master reset,
begin counting
Off
Input mode
Points to the top of the stack
Rev. 1.90
11 November 30, 2005
Datasheet pdf - http://www.DataSheet4U.co.kr/
11 Page | ||
| Páginas | Total 38 Páginas | |
| PDF Descargar | [ Datasheet HT47C10L.PDF ] | |
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