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PDF 843252AGLF Data sheet ( Hoja de datos )
| Número de pieza | 843252AGLF | |
| Descripción | ICS843252AGLF | |
| Fabricantes | Integrated Circuit System | |
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Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843252
FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS843252 is a 2 differential output LVPECL
ICS Synthesizer designed to generate Ethernet refer-
HiPerClockS™ ence clock frequencies and is a member of the
HiPerClocks™ family of high performance clock
solutions from ICS. Using a 19.53125MHz or
25MHz, 18pF parallel resonant crystal, the following frequen-
cies can be generated based on the settings of 4 frequency
select pins (SEL[A1:A0], SEL[B1:B0]): 625MHz, 312.5MHz,
156.25MHz, and 125MHz.
The two banks have their own dedicated frequency select
pins and can be independently set for the frequencies
mentioned above. The ICS843252 ICS’ 3rd generation
low phase noise VCO technology and can achieve 1ps or
lower typical rms phase jitter, easily meeting Ethernet
jitter requirements. The ICS843252 is packaged in a small
16-pin TSSOP package.
FEATURES
• Two 3.3V differential LVPECL output pairs
• Using a 19.53125MHz or 25MHz crystal, the two output
banks can be independently set for 625MHz, 312.5MHz,
156.25MHz or 125MHz
• Crystal oscillator interface
• VCO range: 490MHz to 680MHz
• RMS phase jitter @ 156.25MHz (1.875MHz - 20MHz):
0.47ps (typical)
• Full 3.3V supply mode
• 0°C to 70°C ambient operating temperature
• Industrial temperature available upon request
• Available in both standard and lead-free RoHS-compliant
packages
www.DataSheet.co.kr
BLOCK DIAGRAM
SELA[0:1} Pullup
2
XTAL_IN
XTAL_OUT
OSC
Phase
Detector
VCO
490MHz - 680MHz
FB_SEL Pulldown
SELB[0:1} Pullup
2
Feedback Divider
0 = ÷25 (default)
1 = ÷32
0 0 ÷1
0 1 ÷2
1 0 ÷3
1 1 ÷4 (default)
0 0 ÷2
0 1 ÷4
1 0 ÷5
1 1 ÷8 (default)
QA
nQA
QB
nQB
PIN ASSIGNMENT
nQB
QB
VCCO_B
SELB1
SELB0
VCCO_A
QA
nQA
1
2
3
4
5
6
7
8
16 XTAL_IN
15 XTAL_OUT
14 VEE
13 SELA1
12 SELA0
11 VCC
10 VCCA
9 FB_SEL
ICS843252
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm
package body
G Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
843252AG
www.icst.com/products/hiperclocks.html
REV. A NOVEMBER 9, 2005
1
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843252
FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
CC
Inputs, VI
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance, θJA
Storage Temperature, TSTG
4.6V
-0.5V to VCC + 0.5V
50mA
100mA
89°C/W (0 lfpm)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = VCCO_A, VCCO_B = 3.3V±5%, TA = 0°C TO 70°C
Symbol
Parameter
Test Conditions
Minimum Typical
VCC
VCCA
V VCCO_A, CCO_B
IEE
ICCA
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
3.135
3.135
3.135
3.3
3.3
3.3
122
7
Maximum
3.465
3.465
3.465
Units
V
V
V
mA
mA
www.DataSheet.co.kr
TABLE
4B.
LVCMOS
/
LVTTL
DC
CHARACTERISTICS,
V
CC
=
V
CCA
=
V
CCO_A
=
V
CCO_B
=
3.3V±5%,
TA
=
0°C
TO
70°C
Symbol
VIH
VIL
IIH
IIL
Parameter
Input High Voltage
Input Low Voltage
Input
FB_SEL
High Current SELA0, SELA1,
SELB0, SELB1
Input
FB_SEL
Low Current SELA0, SELA1,
SELB0, SELB1
Test Conditions
VCC = VIN = 3.465V
VCC = VIN = 3.465V
VCC = 3.465V, VIN = 0V
VCC = 3.465V, VIN = 0V
Minimum
2
-0.3
Typical
Maximum
VCC + 0.3
0.8
150
Units
V
V
µA
5 µA
-5 µA
-150
µA
TABLE
4C.
LVPECL
DC
CHARACTERISTICS,
V
CC
=
V
CCA
=
V
CCO_A
=
V
CCO_B
=
3.3V±5%,
TA
=
0°C
TO
70°C
Symbol Parameter
Test Conditions
Minimum Typical
VOH Output High Voltage; NOTE 1
VOL Output Low Voltage; NOTE 1
VSWING Peak-to-Peak Output Voltage Swing
NOTE 1: Outputs terminated with 50Ω to VCCO_B - 2V.
VCCO - 1.4
VCCO - 2.0
0.6
Maximum
VCCO - 0.9
VCCO - 1.7
1.0
Units
V
V
V
843252AG
www.icst.com/products/hiperclocks.html
5
REV. A NOVEMBER 9, 2005
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843252
FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS843252.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843252 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 122mA = 422.73mW
• Power (outputs) = 30mW/Loaded Output pair
MAX
If all outputs are loaded, the total power is 2 * 30mW = 60mW
Total Power (3.465V, with all outputs switching) = 422.73mW + 60mW = 482.73mW
_MAX
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device.The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
www.DataSheet.co.kr
θJA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 81.8°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.483W * 81.8°C/W = 109.5°C. This is well below the limit of 125°C.
This calculation is only an example.Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 7.THERMAL RESISTANCE θJA FOR 16-PINTSSOP, FORCED CONVECTION
θJA by Velocity (Linear Feet per Minute)
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
0
137.1°C/W
89.0°C/W
200
118.2°C/W
81.8°C/W
500
106.8°C/W
78.1°C/W
NOTE: Most modern PCB designs use multi-layered boards.The data in the second row pertains to most designs.
843252AG
www.icst.com/products/hiperclocks.html
11
REV. A NOVEMBER 9, 2005
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
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