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PDF W681310 Data sheet ( Hoja de datos )
| Número de pieza | W681310 | |
| Descripción | 3V SINGLE CHANNEL VOICEBAND CODEC | |
| Fabricantes | Nuvoton Technology | |
| Logotipo |  |
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W681310
W681310
3V SINGLE CHANNEL
VOICEBAND CODEC
Data Sheet
Revision B18
-1-
1 page  
W681310
10.5.3. PCM Codes for Zero and Full Scale ................................................................................... 29
10.5.4. PCM Codes for 0dBm0 Output ........................................................................................... 29
11. TYPICAL APPLICATION CIRCUIT ................................................................................................. 30
12. PACKAGE SPECIFICATION .......................................................................................................... 32
12.1. 20L SOG (SOP)-300mil ............................................................................................................. 32
12.2. 20L SSOP-209 mil ..................................................................................................................... 33
12.3. 20L TSSOP - 4.4X6.5mm .......................................................................................................... 34
13. ORDERING INFORMATION........................................................................................................... 35
14. VERSION HISTORY ....................................................................................................................... 36
Publication Release Date: February 2015
- 5 - Revision B18
5 Page 
W681310
7.3. POWER MANAGEMENT
7.3.1. Analog and Digital Supply
The power supply for the analog and digital parts of the W681310 must be 2.7V to 5.25V. This supply
voltage is connected to the VDD pin. The VDD pin needs to be decoupled to ground through a 0.1 F
ceramic capacitor.
7.3.2. Analog Ground Reference Bypass
The system has an internal precision voltage reference which generates the VDD/2 mid-supply analog
ground voltage. This voltage needs to be decoupled to VSS at the VREF pin through a 0.1 F ceramic
capacitor.
7.3.3. Analog Ground Reference Voltage Outpt
The analog ground reference voltage is available for external reference at the VAG pin. This voltage
needs to be decoupled to VSS through a 0.01 F ceramic capacitor. The analog ground reference
voltage is generated from the voltage on the VREF pin and is also used for the internal signal processing.
7.4. PCM INTERFACE
The PCM interface is controlled by pins BCLKR, FSR, BCLKT & FST. The input data is received
through the PCMR pin and the output data is transmitted through the PCMT pin. The modes of
operation of the interface are shown in Table 7.3.
BCLKR
FSR
Interface Mode
64 kHz to
4.800 MHz
8 kHz Long or Short Frame Sync
VSS VSS ISDN GCI with active channel B1
VSS VDD ISDN GCI with active channel B2
VDD VSS ISDN IDL with active channel B1
VDD VDD ISDN IDL with active channel B2
Table 7.3 PCM Interface mode selections
7.4.1. Long Frame Sync
The Long Frame Sync or Short Frame Sync interface mode can be selected by connecting the BCLKR
or BCLKT pin to a 64 kHz to 4.800 MHz clock and connecting the FSR or FST pin to the 8 kHz frame
sync. The device synchronizes the data word for the PCM interface and the CODEC sample rate on the
- 11 -
Publication Release Date: February 2015
Revision B18
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet W681310.PDF ] | |
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