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PDF PSMN4R3-100ES Data sheet ( Hoja de datos )
| Número de pieza | PSMN4R3-100ES | |
| Descripción | N-channel MOSFET | |
| Fabricantes | NXP Semiconductors | |
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PSMN4R3-100ES
N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK
Rev. 1 — 31 October 2011
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel MOSFET in a I2PAK package qualified to 175 °C. This product
is designed and qualified for use in a wide range of industrial, communications and
domestic equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Suitable for standard level gate drive
sources
1.3 Applications
DC-to-DC converters
Load switching
Motor control
Server power supplies
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter
VDS drain-source voltage
ID drain current
Ptot total power dissipation
Tj junction temperature
Static characteristics
Conditions
Min Typ Max Unit
Tj ≥ 25 °C; Tj ≤ 175 °C
- - 100 V
Tmb = 25 °C; VGS = 10 V; see Figure 1 [1] - - 120 A
Tmb = 25 °C; see Figure 2
- - 338 W
-55 -
175 °C
RDSon
drain-source on-state
resistance
VGS = 10 V; ID = 25 A; Tj = 100 °C;
see Figure 12; see Figure 13
- 6.6 7.8 mΩ
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 13
[2] -
3.7 4.3 mΩ
Dynamic characteristics
QGD gate-drain charge
QG(tot)
total gate charge
Avalanche ruggedness
VGS = 10 V; ID = 75 A; VDS = 50 V;
see Figure 14; see Figure 15
- 49 - nC
- 170 - nC
EDS(AL)S
non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 120 A;
Vsup ≤ 100 V; RGS = 50 Ω; Unclamped
- - 537 mJ
[1] Continuous current limited by package
[2] Measured 3 mm from package.
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NXP Semiconductors
PSMN4R3-100ES
N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK
6. Characteristics
Table 6. Characteristics
Symbol
Parameter
Conditions
Min
Static characteristics
V(BR)DSS
VGS(th)
drain-source breakdown
voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10
100
90
-
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 10
1
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 11; see Figure 10
2
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VDS = 100 V; VGS = 0 V; Tj = 25 °C
VDS = 100 V; VGS = 0 V; Tj = 175 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; ID = 25 A; Tj = 175 °C;
see Figure 12; see Figure 13
-
-
-
-
-
VGS = 10 V; ID = 25 A; Tj = 100 °C;
see Figure 12; see Figure 13
-
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 13
[1] -
RG gate resistance
Dynamic characteristics
f = 1 MHz
-
QG(tot)
total gate charge
ID = 75 A; VDS = 50 V; VGS = 10 V;
see Figure 14; see Figure 15
-
QGS
QGS(th)
gate-source charge
pre-threshold gate-source
charge
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 75 A; VDS = 50 V; VGS = 10 V;
see Figure 14; see Figure 15
-
-
-
QGS(th-pl)
post-threshold gate-source
charge
-
QGD
VGS(pl)
gate-drain charge
gate-source plateau voltage
VDS = 50 V; see Figure 14;
see Figure 15
-
-
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
turn-off delay time
fall time
VDS = 50 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
VDS = 50 V; RL = 0.67 Ω; VGS = 10 V;
RG(ext) = 4.7 Ω; ID = 75 A; Tj = 25 °C
-
-
-
-
-
-
-
Typ Max Unit
--V
--V
- 4.6 V
--V
34V
0.08 10
- 500
10 100
10 100
10.4 12
µA
µA
nA
nA
mΩ
6.6 7.8 mΩ
3.7 4.3 mΩ
0.9 -
Ω
170 -
140 -
48 -
31 -
17.3 -
49 -
5.1 -
9900
660
381
45
91
122
63
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
nC
V
pF
pF
pF
ns
ns
ns
ns
PSMN4R3-100ES
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 31 October 2011
© NXP B.V. 2011. All rights reserved.
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8. Revision history
Table 7. Revision history
Document ID
Release date
PSMN4R3-100ES v.1 20111031
PSMN4R3-100ES
N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK
Data sheet status
Product data sheet
Change notice
-
Supersedes
-
PSMN4R3-100ES
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 31 October 2011
© NXP B.V. 2011. All rights reserved.
11 of 14
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