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Teilenummer | MK20DN512ZVLK10 |
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Beschreibung | K20 Sub-Family | |
Hersteller | Freescale Semiconductor | |
Logo | ||
Gesamt 30 Seiten www.DataSheet.co.kr
Freescale Semiconductor
Data Sheet: Technical Data
Document Number: K20P81M100SF2
Rev. 6, 9/2011
K20 Sub-Family Data Sheet
Supports the following:
MK20DX256ZVLK10,
MK20DN512ZVLK10,
MK20DX256ZVMB10,
MK20DN512ZVMB10
Features
• Operating Characteristics
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
• Performance
– Up to 100 MHz ARM Cortex-M4 core with DSP
instructions delivering 1.25 Dhrystone MIPS per
MHz
• Memories and memory interfaces
– Up to 512 KB program flash memory on non-
FlexMemory devices
– Up to 256 KB program flash memory on
FlexMemory devices
– Up to 256 KB FlexNVM on FlexMemory devices
– 4 KB FlexRAM on FlexMemory devices
– Up to 128 KB RAM
– Serial programming interface (EzPort)
– FlexBus external bus interface
• Clocks
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
• System peripherals
– 10 low-power modes to provide power optimization
based on application requirements
– Memory protection unit with multi-master
protection
– 16-channel DMA controller, supporting up to 64
request sources
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
K20P81M100SF2
• Security and integrity modules
– Hardware CRC module to support fast cyclic
redundancy checks
– 128-bit unique identification (ID) number per chip
• Human-machine interface
– Low-power hardware touch sensor interface (TSI)
– General-purpose input/output
• Analog modules
– Two 16-bit SAR ADCs
– Programmable gain amplifier (PGA) (up to x64)
integrated into each ADC
– 12-bit DAC
– Three analog comparators (CMP) containing a 6-bit
DAC and programmable reference input
– Voltage reference
• Timers
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
timer
– Two 2-channel quadrature decoder/general purpose
timers
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
• Communication interfaces
– USB full-/low-speed On-the-Go controller with on-
chip transceiver
– Two Controller Area Network (CAN) modules
– Two SPI modules
– Two I2C modules
– Four UART modules
– Secure Digital host controller (SDHC)
– I2S module
Freescale reserves the right to change the detail specifications as may be
required to permit improvements in the design of its products.
© 2010–2011 Freescale Semiconductor, Inc.
Datasheet pdf - http://www.DataSheet4U.net/
www.DataSheet.co.kr
Terminology and guidelines
3.1 Definition: Operating requirement
An operating requirement is a specified value or range of values for a technical
characteristic that you must guarantee during operation to avoid incorrect operation and
possibly decreasing the useful life of the chip.
3.1.1 Example
This is an example of an operating requirement, which you must meet for the
accompanying operating behaviors to be guaranteed:
Symbol
VDD
Description
Min.
1.0 V core supply
voltage
0.9
Max.
1.1
Unit
V
3.2 Definition: Operating behavior
An operating behavior is a specified value or range of values for a technical
characteristic that are guaranteed during operation if you meet the operating requirements
and any other specified conditions.
3.2.1 Example
This is an example of an operating behavior, which is guaranteed if you meet the
accompanying operating requirements:
Symbol
IWP
Description
Digital I/O weak pullup/ 10
pulldown current
Min.
Max.
130
Unit
µA
3.3 Definition: Attribute
An attribute is a specified value or range of values for a technical characteristic that are
guaranteed, regardless of whether you meet the operating requirements.
K20 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011.
6 Freescale Semiconductor, Inc.
Datasheet pdf - http://www.DataSheet4U.net/
6 Page www.DataSheet.co.kr
General
5.2.1 Voltage and current operating requirements
Table 1. Voltage and current operating requirements
Symbol Description
VDD Supply voltage
VDDA
Analog supply voltage
VDD – VDDA VDD-to-VDDA differential voltage
VSS – VSSA VSS-to-VSSA differential voltage
VBAT
RTC battery supply voltage
VIH Input high voltage
• 2.7 V ≤ VDD ≤ 3.6 V
• 1.7 V ≤ VDD ≤ 2.7 V
Min.
1.71
1.71
–0.1
–0.1
1.71
Max.
3.6
3.6
0.1
0.1
3.6
0.7 × VDD
0.75 × VDD
—
—
Unit
V
V
V
V
V
V
V
Notes
VIL Input low voltage
• 2.7 V ≤ VDD ≤ 3.6 V
• 1.7 V ≤ VDD ≤ 2.7 V
— 0.35 × VDD V
— 0.3 × VDD V
VHYS
Input hysteresis
0.06 × VDD
—
V
IICDIO
Digital pin negative DC injection current — single pin
• VIN < VSS-0.3V
-5
— mA
1
IICAIO
Analog2, EXTAL, and XTAL pin DC injection current
— single pin
• VIN < VSS-0.3V (Negative current injection)
• VIN > VDD+0.3V (Positive current injection)
-5
—
mA
—
+5
3
IICcont
Contiguous pin DC injection current —regional limit,
includes sum of negative injection currents or sum of
positive injection currents of 16 contiguous pins
• Negative current injection
-25 — mA
• Positive current injection
— +25
VRAM
VRFVBAT
VDD voltage required to retain RAM
VBAT voltage required to retain the VBAT register file
1.2
VPOR_VBAT
—
—
V
V
1. All 5 volt tolerant digital I/O pins are internally clamped to VSS through a ESD protection diode. There is no diode
connection to VDD. If VIN greater than VDIO_MIN (=VSS-0.3V) is observed, then there is no need to provide current limiting
resistors at the pads. If this limit cannot be observed then a current limiting resistor is required. The negative DC injection
current limiting resistor is calculated as R=(VDIO_MIN-VIN)/|IIC|.
2. Analog pins are defined as pins that do not have an associated general purpose I/O port function.
3. All analog pins are internally clamped to VSS and VDD through ESD protection diodes. If VIN is greater than VAIO_MIN
(=VSS-0.3V) and VIN is less than VAIO_MAX(=VDD+0.3V) is observed, then there is no need to provide current limiting
resistors at the pads. If these limits cannot be observed then a current limiting resistor is required. The negative DC
injection current limiting resistor is calculated as R=(VAIO_MIN-VIN)/|IIC|. The positive injection current limiting resistor is
calcualted as R=(VIN-VAIO_MAX)/|IIC|. Select the larger of these two calculated resistances.
K20 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011.
12
Freescale Semiconductor, Inc.
Datasheet pdf - http://www.DataSheet4U.net/
12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ MK20DN512ZVLK10 Schematic.PDF ] |
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