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SX1239 Schematic ( PDF Datasheet ) - Semtech Corporation

Teilenummer SX1239
Beschreibung Low Power Integrated UHF Receiver
Hersteller Semtech Corporation
Logo Semtech Corporation Logo 




Gesamt 30 Seiten
SX1239 Datasheet, Funktion
www.DataSheet.co.kr
SX1239
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
SX1239 Receiver
Low Power Integrated UHF Receiver
RFIN
VBAT1&2
VR_ANA
VR_DIG
Power Distribution System
LNA
Single to
Differential
Mixers
Σ/Δ
Modulators
RC
Oscillator
RESET
SPI
Division by
2, 4 or 6
RSSI
AFC
GND
Tank
Inductor
Loop Frac-N PLL
NC Filter Synthesizer
NC
NC XO
32 MHz
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
XTAL
GENERAL DESCRIPTION
The SX1239 is a highly integrated RF receiver capable of
operation over a wide frequency range, including the 433,
868 and 915 MHz license-free ISM (Industry Scientific and
Medical) frequency bands. Its highly integrated architecture
allows for a minimum of external components whilst
maintaining maximum design flexibility. All major RF
communication parameters are programmable and most of
them can be dynamically set. The SX1239 offers the unique
advantage of programmable narrow-band and wide-band
communication modes without the need to modify external
components. The SX1239 is optimized for low power
consumption while offering high sensitivity and channelized
operation. TrueRF™ technology enables a lowcost external
component count (elimination of the SAW filter) whilst still
satisfying ETSI and FCC regulations.
APPLICATIONS
Š Automated Meter Reading
Š Wireless Sensor Networks
Š Home and Building Automation
Š Wireless Alarm and Security Systems
Š Industrial Monitoring and Control
GND
KEY PRODUCT FEATURES
Š High Sensitivity: down to -120 dBm at 1.2 kbps
Š High Selectivity: 16-tap FIR Channel Filter
Š Bullet-proof front end: IIP3 = -18 dBm, IIP2 = +35 dBm,
80 dB Blocking Immunity, no Image Frequency response
Š Low current: Rx = 16 mA, 100nA register retention
Š Constant RF performance over voltage range of chip
Š FSK Bit rates up to 300 kb/s
Š Fully integrated synthesizer with a resolution of 61 Hz
Š FSK, GFSK, MSK, GMSK and OOK demodulation
Š Built-in Bit Synchronizer performing Clock Recovery
Š Incoming Sync Word Recognition
Š 115 dB+ Dynamic Range RSSI
Š Automatic RF Sense with ultra-fast AFC
Š Packet engine with CRC, AES-128 encryption and 66-
byte FIFO
Š Built-in temperature sensor and Low Battery indicator
ORDERING INFORMATION
MARKETS
Š Europe: EN 300-220-1
Š North America: FCC Part 15.247, 15.249, 15.231
Š Narrow Korean and Japanese bands
Part Number
SX1239IMLTRT
Delivery
Tape & Reel
MOQ / Multiple
3000 pieces
Š QFN 24 Package - Operating Range [-40;+85°C]
Š Pb-free, Halogen free, RoHS/WEEE compliant product
Rev 2 - April 2010
Page 1
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Datasheet pdf - http://www.DataSheet4U.net/






SX1239 Datasheet, Funktion
www.DataSheet.co.kr
SX1239
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
Figure 42. Exiting Listen Mode in SX1239 V2a ........................................................................................................... 71
Figure 43. RegTestOok Description ............................................................................................................................ 71
Index of Tables
Page
Table 1. SX1239 Pinouts .............................................................................................................................................. 10
Table 2. Absolute Maximum Ratings ............................................................................................................................ 11
Table 3. Operating Range ............................................................................................................................................ 11
Table 4. Power Consumption Specification .................................................................................................................. 12
Table 5. Frequency Synthesizer Specification .............................................................................................................. 12
Table 6. Receiver Specification .................................................................................................................................... 13
Table 7. Digital Specification ........................................................................................................................................ 14
Table 8. LNA Gain Settings .......................................................................................................................................... 18
Table 9. Receiver Performance Summary .................................................................................................................... 19
Table 10. Available RxBw Settings ............................................................................................................................... 21
Table 11. Bit Rate Examples ........................................................................................................................................ 23
Table 12. Basic Receiver Modes .................................................................................................................................. 30
Table 13. Range of Durations in Listen Mode .............................................................................................................. 33
Table 14. Signal Acceptance Criteria in Listen Mode ................................................................................................... 34
Table 15. End of Listen Cycle Actions .......................................................................................................................... 34
Table 16. Status of FIFO when Switching Between Different Modes of the Chip ......................................................... 40
Table 17. DIO Mapping, Continuous Mode .................................................................................................................. 42
Table 18. DIO Mapping, Packet Mode ......................................................................................................................... 42
Table 19. Registers Summary ...................................................................................................................................... 52
Table 20. Common Configuration Registers ................................................................................................................. 55
Table 21. Receiver Registers ....................................................................................................................................... 58
Table 22. IRQ and Pin Mapping Registers ................................................................................................................... 60
Table 23. Packet Engine Registers .............................................................................................................................. 62
Table 24. Temperature Sensor Registers ..................................................................................................................... 65
Table 25. Test Registers .............................................................................................................................................. 65
Table 26. Crystal Specification ..................................................................................................................................... 66
Table 27. Chip Identification ......................................................................................................................................... 70
Table 28. Revision History ............................................................................................................................................ 72
Rev 2 - April 2010
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Datasheet pdf - http://www.DataSheet4U.net/

6 Page









SX1239 pdf, datenblatt
www.DataSheet.co.kr
SX1239
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
2.4. Chip Specification
The tables below give the electrical specifications of the receiver under the following conditions: Supply voltage VBAT1=
VBAT2=VDD=3.3 V, temperature = 25 °C, FXOSC = 32 MHz, FRF = 915 MHz, 2-level FSK modulation without pre-filtering,
Bit Rate = 4.8 kb/s and terminated in a matched 50 Ohm impedance, unless otherwise specified.
Note Unless otherwise specified, the performances in the other frequency bands are similar or better.
2.4.1. Power Consumption
Table 4 Power Consumption Specification
Symbol
IDDSL
IDDIDLE
IDDST
IDDFS
IDDR
Description
Supply current in sleep mode
Supply current in Idle mode
Supply current in standby mode
Supply current in synthesizer
mode
Supply current in receive mode
Conditions
RC oscillator enabled
Crystal oscillator enabled
2.4.2. Frequency Synthesis
Table 5 Frequency Synthesizer Specification
Min Typ Max Unit
- 0.1 1 uA
- 1.2 - uA
- 1.25 1.5 mA
- 9 - mA
- 16 - mA
Symbol
FR
FXOSC
TS_OSC
TS_FS
TS_HOP
FSTEP
FRC
BRF
BRO
Description
Synthesizer Frequency Range
Conditions
Programmable
Crystal oscillator frequency
Crystal oscillator wake-up time
See section 7.1
Min
290
424
862
-
-
Frequency synthesizer wake-up
time to PllLock signal
Frequency synthesizer hop time
at most 10 kHz away from the
target
From Standby mode
200 kHz step
1 MHz step
5 MHz step
7 MHz step
12 MHz step
20 MHz step
25 MHz step
Frequency synthesizer step
RC Oscillator frequency
Bit rate, FSK
Bit rate, OOK
FSTEP = FXOSC/219
After calibration
Programmable
Programmable
-
-
-
-
-
-
-
-
-
-
1.2
1.2
Typ
-
-
-
32
250
80
20
20
50
50
80
80
80
61.0
62.5
-
-
Max
340
510
1020
-
500
150
Unit
MHz
MHz
MHz
MHz
us
us
- us
- us
- us
- us
- us
- us
- us
- Hz
-
300
32.768
kHz
kbps
kbps
Rev 2 - April 2010
Page 12
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