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Teilenummer | F81232 |
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Beschreibung | USB to UART Chip | |
Hersteller | Feature Integration Technology | |
Logo | ||
Gesamt 14 Seiten www.DataSheet4U.net
F81232
F81232
USB to UART Chip
Release Date: August, 2008
Version: V0.10P
F81232
.
Aug., 2008
V0.10P
www.DataSheet4U.net
Pin No
Pin Name
1 D+
2 D-
3 XTALIN/48M
4 XTALOUT
5 SCL
6 SDA
7 RTS#
8 GND
9 DTR#
10 TXD
11 RXD
12 CTS#
13 DSR#
14 DCD#
15 RI#
16 VDD
F81232
Type
AIO1.5k
AIO
INt
O12
OD12_4.7k
OD12_4.7k
O12
P
I/O12st_5v
O12
INts_5V
INts_5V
INts_5V
INts_5V
INts_5V
P
PWR
Description
VDD D+, different data bus conforming to USB standard. internal pull
high 1.5k
VDD D-, different data bus conforming to USB standard.
VDD 12MHz/48Mhz clock input.
VDD 12 MHz clock output.
VDD I2C serial clock internal pull high 4.7k
VDD I2C serial data internal pull high 4.7k
VDD Serial port (request to send)
GND GND
VDD Serial port(data terminal ready)
VDD Serial port(transmitted data )
VDD Serial port(received data)
VDD Serial port(clear to send)
VDD Serial port(data set ready)
VDD Serial port(data carrier detect)
VDD Serial port(ring indicator)
VDD Power supply input 3.3v
5. Functional Description
5.1 USB function
The F81232 communications with host by full-speed USB interface (12Mb/s). It supports 4 suits endpoint, one control
endpoint( endpoint zero) is for bus enumeration, one output endpoint is for UART transmit data and two input endpoint is
transmit UART data and status to host.
Endpoint zero is special significance in USB system. It is a control endpoint, and is required by every device. Only control
endpoint accept special setup token that the host transfer command to device.
During enumeration, host requests GET_DESCRIPTOR to device and device return information (over in endpoint zero) as
what device driver top load. The F81232 get descriptor information from I2C flash/ROM, the F81232 returns default description
to Host. If I2C flash/ROM does not connect with F81232, the below table is about F81232 default descriptor.
offset
0
Field
BLength
size Value
1 0x12
F81232.
Aug., 2008
V0.10P
6 Page www.DataSheet4U.net
Input High Leakage
ILIH
+1
Input Low Leakage
ILIL -1
INts_5v – TTL level input pin and schmitt trigger, 5 tolerance
Input Low Threshold Voltage
VIL
0.8
Input Hign Threshold Voltage
VIH 2.0
Hysteresis
0.5
Input High Leakage
ILIH
+1
Input Low Leakage
ILIL -1
Table 6-3: PAD DC table
USB Interface
Parameter
Rise Time
Fall Time
Differential Rise and Fall Time
Matching
Driver Output Resistance
Symbol
TFR
TFF
TFRFM
ZDRV
Min.
4
4
90
28
USB AC table
µA
µA
V
V
V
µA
µA
Max.
20
20
111.11
44
F81232
Units
Ns
Ns
%
Ω
USB timing
F81232.
Aug., 2008
V0.10P
12 Page | ||
Seiten | Gesamt 14 Seiten | |
PDF Download | [ F81232 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
F81232 | USB to UART Chip | Feature Integration Technology |
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