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PH2525L Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer PH2525L
Beschreibung N-channel TrenchMOS ultra low level FET
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 12 Seiten
PH2525L Datasheet, Funktion
www.DataSheet4U.net
PH2525L
N-channel TrenchMOS logic level FET
Rev. 02 — 5 December 2006
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology.
1.2 Features
I Logic level threshold
I Optimized for use in DC-to-DC
converters
I 100 % RG tested
1.3 Applications
I DC-to-DC converters
I Voltage regulators
I Lead-free package
I Very low switching and conduction
losses
I Switched-mode power supplies
I PC Motherboards
1.4 Quick reference data
I VDS 25 V
I RDSon 2.5 m
I ID 100 A
I QGD = 6.8 nC (typ)
2. Pinning information
Table 1. Pinning
Pin Description
1, 2, 3 source (S)
4 gate (G)
mb mounting base; connected to drain (D)
Simplified outline
mb
1234
SOT669 (LFPAK)
Symbol
D
G
mbb076 S






PH2525L Datasheet, Funktion
www.DataSheet4U.net
NXP Semiconductors
PH2525L
N-channel TrenchMOS logic level FET
100
ID
(A)
80
10 4.5 3.6
3.4
003aab429
3.2
20
RDSon
(m)
16
2.8
3
003aab430
60
40
20
0
0
3
2.8
2.6
VGS (V) = 2.4
0.2 0.4 0.6 0.8
1
VDS (V)
12 VGS (V) = 3.2
8
3.4
4 3.6
4.5
10
0
0 20 40 60 80 100
ID (A)
Tj = 25 °C
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values
Tj = 25 °C
Fig 6. Drain-source on-state resistance as a function
of drain current; typical values
100
ID
(A)
80
003aab431
2
a
1.6
003aab467
60 1.2
40
Tj = 150 °C
25 °C
20
0.8
0.4
0
01234
VGS (V)
Tj = 25 °C and 150 °C; VDS > ID × RDSon
Fig 7. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
0
-60 0 60 120 180
Tj (°C)
a = -R---D----RS---o-D--n--S(--2o--5-n--°--C----)
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature
PH2525L_2
Product data sheet
Rev. 02 — 5 December 2006
© NXP B.V. 2006. All rights reserved.
6 of 12

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PH2525L pdf, datenblatt
www.DataSheet4U.net
NXP Semiconductors
11. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
9.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
9.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
9.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
10 Contact information. . . . . . . . . . . . . . . . . . . . . 11
11 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
PH2525L
N-channel TrenchMOS logic level FET
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2006.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 5 December 2006
Document identifier: PH2525L_2

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