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PDF PIC18LF46J13 Data sheet ( Hoja de datos )
| Número de pieza | PIC18LF46J13 | |
| Descripción | High-Performance Microcontrollers | |
| Fabricantes | Microchip Technology | |
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PIC18F47J13 Family
Data Sheet
28/44-Pin, High-Performance
Microcontrollers with
nanoWatt XLP Technology
2010 Microchip Technology Inc.
Preliminary
DS39974A
1 page  
www.DataSheet4U.net
Pin Diagrams
44-Pin TQFP
PIC18F47J13 FAMILY
= Pins are up to 5.5V tolerant
RC7/CCP10/PMA4/RX1/DT1/RP18
RD4/PMD4/RP21
RD5/PMD5/RP22
RD6/PMD6/RP23
RD7/PMD7/RP24
VSS1
VDD1
RB0/AN12/C3IND/INT0/RP3
RB1/AN10/C3INC/PMBE/RTCC/RP4
RB2/AN8/C2INC/CTED1/PMA3/REFO/RP5
RB3/AN9/C3INA/CTED2/PMA2/RP6
1 33
2 32
3 31
4 30
5 29
6 PIC18F4XJ13 28
7 27
8 26
9 25
10 24
11 23
NC
RC0/T1OSO/T1CKI/RP11
OSC2/CLKO/RA6
OSC1/CLKI/RA7
VSS2
VDD2
RE2/AN7/PMCS
RE1/AN6/PMWR
RE0/AN5/PMRD
RA5/AN4/C1INC/SS1/HLVDIN/RP2
VDDCORE/VCAP
Legend:
RPn represents remappable pins.Some input and output functions are routed through the Peripheral Pin
Select (PPS) module and can be dynamically assigned to any of the RPn pins. For a list of the input and
output functions, see Table 10-13 and Table 10-14, respectively. For details on configuring the PPS module,
see Section 10.7 “Peripheral Pin Select (PPS)”.
2010 Microchip Technology Inc.
Preliminary
DS39974A-page 5
5 Page 
www.DataSheet4U.net
PIC18F47J13 FAMILY
1.0 DEVICE OVERVIEW
This document contains device-specific information for
the following devices:
• PIC18F26J13
• PIC18F27J13
• PIC18F46J13
• PIC18F47J13
• PIC18LF26J13
• PIC18LF27J13
• PIC18LF46J13
• PIC18LF47J13
1.1 Core Features
1.1.1 nanoWatt XLP TECHNOLOGY
All of the devices in the PIC18F47J13 family incorpo-
rate a range of features that can significantly reduce
power consumption during operation. Key features are:
• Alternate Run Modes: By clocking the controller
from the Timer1 source or the internal RC
oscillator, power consumption during code
execution can be reduced by as much as 90%.
• Multiple Idle Modes: The controller can also run
with its CPU core disabled but the peripherals still
active. In these states, power consumption can be
reduced even further, to as little as 4% of normal
operational requirements.
• On-the-Fly Mode Switching: The
power-managed modes are invoked by user code
during operation, allowing the users to incorporate
power-saving ideas into their application’s
software design.
• Deep Sleep: The 2.5V internal core voltage regu-
lator on F parts can be shutdown to cut power
consumption to as low as 15 nA (typical). Certain
features can remain operating during Deep Sleep,
such as the Real-Time Clock Calendar.
• Ultra Low Power Wake-Up: Waking from Sleep
or Deep Sleep modes after a period of time can
be done without an oscillator/clock source, saving
power for applications requiring periodic activity.
1.1.2
OSCILLATOR OPTIONS AND
FEATURES
All of the devices in the PIC18F47J13 family offer five
different oscillator options, allowing users a range of
choices in developing application hardware. These
include:
• Two Crystal modes, using crystals or ceramic
resonators.
• Two External Clock modes, offering the option of
a divide-by-4 clock output.
• An internal oscillator block, which provides an
8 MHz clock and an INTRC source (approxi-
mately 31 kHz, stable over temperature and VDD),
as well as a range of six user selectable clock
frequencies, between 125 kHz to 4 MHz, for a
total of eight clock frequencies. This option frees
an oscillator pin for use as an additional general
purpose I/O.
• A Phase Lock Loop (PLL) frequency multiplier
available to the high-speed crystal, and external
and internal oscillators, providing a clock speed
up to 48 MHz.
The internal oscillator block provides a stable reference
source that gives the PIC18F47J13 family additional
features for robust operation:
• Fail-Safe Clock Monitor: This option constantly
monitors the main clock source against a reference
signal provided by the internal oscillator. If a clock
failure occurs, the controller is switched to the
internal oscillator, allowing for continued low-speed
operation or a safe application shutdown.
• Two-Speed Start-up: This option allows the
internal oscillator to serve as the clock source
from Power-on Reset (POR), or wake-up from
Sleep mode, until the primary clock source is
available.
2010 Microchip Technology Inc.
Preliminary
DS39974A-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PIC18LF46J13.PDF ] | |
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