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XC164N-16F Schematic ( PDF Datasheet ) - Infineon Technologies

Teilenummer XC164N-16F
Beschreibung 16-Bit Single-Chip Microcontroller
Hersteller Infineon Technologies
Logo Infineon Technologies Logo 




Gesamt 30 Seiten
XC164N-16F Datasheet, Funktion
Data Sheet, V1.2, Aug. 2006
XC164N-16F/16R
X C 1 6 4 N - 8 F / 8 Rwww.DataSheet4U.net
16-Bit Single-Chip Microcontroller
with C166SV2 Core
Microcontrollers






XC164N-16F Datasheet, Funktion
16-Bit Single-Chip Microcontroller with C166SV2 Core
XC166 Family
XC164N
1 Summary of Features
• High Performance 16-bit CPU with 5-Stage Pipeline
– 25 ns Instruction Cycle Time at 40 MHz CPU Clock (Single-Cycle Execution)
– 1-Cycle Multiplication (16 × 16 bit), Background Division (32 / 16 bit) in 21 Cycles
– 1-Cycle Multiply-and-Accumulate (MAC) Instructions
– Enhanced Boolean Bit Manipulation Facilities
– Zero-Cycle Jump Execution
– Additional Instructions to Support HLL and Operating Systems
– Register-Based Design with Multiple Variable Register Banks
– Fast Context Switching Support with Two Additional Local Register Banks
– 16 Mbytes Total Linear Address Space for Code and Data
– 1024 Bytes On-Chip Special Function Register Area (C166 Family Compatible)
• 16-Priority-Level Interrupt System with up to 75 Sources, Sample-Rate down to 50 ns
• 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
Peripheral Event Controller (PEC), 24-Bit Pointers Cover Total Address Space
• Clock Generation via on-chip PLL (factors 1:0.15 … 1:10), or
via Prescaler (factors 1:1 … 60:1)
• On-Chip Memory Modules
– 2 Kbytes On-Chip Dual-Port RAM (DPRAM)
– 2/4 Kbytes On-Chip Data SRAM (DSRAM)1)
– 2 Kbytes On-Chip Program/Data SRAM (PSRAM)
– 64/128 Kbytes On-Chip Program Memory (Flash Memory or Mask ROM)1)
• On-Chip Peripheral Modules
– Two 16-Channel General Purpose Capture/Compare Units (12 Input/Output Pins)
– Capture/Compare Unit for flexible PWM Signal Generation (CAPCOM6)
(3/6 Capture/Compare Channels and 1 Compare Channel)
– Multi-Functional General Purpose Timer Unit with 5 Timers
– Two Synchronous/Asynchronous Serial Channels (USARTs)
– Two High-Speed-Synchronous Serial Channels
– On-Chip Real Time Clock
• Idle, Sleep, and Power Down Modes with Flexible Power Management
• Programmable Watchdog Timer and Oscillator Watchdog
• Up to 12 Mbytes External Address Space for Code and Data
– Programmable External Bus Characteristics for Different Address Ranges
– Multiplexed or Demultiplexed External Address/Data Buses
1) Depends on the respective derivative. The derivatives are listed in Table 1.
Data Sheet
4
V1.2, 2006-08

6 Page









XC164N-16F pdf, datenblatt
XC164N
Derivatives
General Device Information
Table 2
Pin Definitions and Functions (cont’d)
Symbol Pin Input Function
Num. Outp.
P5 I Port 5 is a 14-bit input-only port.
Some pins of Port 5 serve as timer inputs:
P5.0
P5.1
P5.2
P5.3
P5.4
P5.5
P5.10
P5.11
P5.6
P5.7
P5.12
P5.13
P5.14
P5.15
TRST
18
19
20
21
22
23
24
25
26
27
30
31
32
33
36
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
No Alternate Function beside General Purpose Input
No Alternate Function beside General Purpose Input
No Alternate Function beside General Purpose Input
No Alternate Function beside General Purpose Input
No Alternate Function beside General Purpose Input
No Alternate Function beside General Purpose Input
T6EUD GPT2 Timer T6 Ext. Up/Down Ctrl. Inp.
T5EUD GPT2 Timer T5 Ext. Up/Down Ctrl. Inp.
No Alternate Function beside General Purpose Input
No Alternate Function beside General Purpose Input
T6IN
GPT2 Timer T6 Count/Gate Input
T5IN
GPT2 Timer T5 Count/Gate Input
T4EUD GPT1 Timer T4 Ext. Up/Down Ctrl. Inp.
T2EUD GPT1 Timer T2 Ext. Up/Down Ctrl. Inp.
Test-System Reset Input. For normal system operation, pin
TRST should be held low. A high level at this pin at the rising
edge of RSTIN activates the XC164CM’s debug system. In
this case, pin TRST must be driven low once to reset the
debug system.
Data Sheet
10 V1.2, 2006-08

12 Page





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